cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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imx53-kp-ddc.dts (3278B)

      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Copyright 2018
      4 * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
      5 */
      6
      7/dts-v1/;
      8#include "imx53-kp.dtsi"
      9
     10/ {
     11	model = "K+P imx53 DDC";
     12	compatible = "kiebackpeter,imx53-ddc", "fsl,imx53";
     13
     14	backlight_lcd: backlight {
     15		compatible = "pwm-backlight";
     16		pwms = <&pwm2 0 50000>;
     17		power-supply = <&reg_backlight>;
     18		brightness-levels = <0 24 28 32 36
     19				     40 44 48 52 56
     20				     60 64 68 72 76
     21				     80 84 88 92 96 100>;
     22		default-brightness-level = <20>;
     23	};
     24
     25	lcd_display: display {
     26		compatible = "fsl,imx-parallel-display";
     27		#address-cells = <1>;
     28		#size-cells = <0>;
     29		interface-pix-fmt = "rgb24";
     30		pinctrl-names = "default";
     31		pinctrl-0 = <&pinctrl_disp>;
     32
     33		port@0 {
     34			reg = <0>;
     35
     36			display1_in: endpoint {
     37				remote-endpoint = <&ipu_di1_disp1>;
     38			};
     39		};
     40
     41		port@1 {
     42			reg = <1>;
     43
     44			lcd_display_out: endpoint {
     45				remote-endpoint = <&lcd_panel_in>;
     46			};
     47		};
     48	};
     49
     50	lcd_panel: lcd-panel {
     51		compatible = "koe,tx14d24vm1bpa";
     52		backlight = <&backlight_lcd>;
     53		power-supply = <&reg_3v3>;
     54
     55		port {
     56			lcd_panel_in: endpoint {
     57				remote-endpoint = <&lcd_display_out>;
     58			};
     59		};
     60	};
     61
     62	reg_backlight: regulator-backlight {
     63		compatible = "regulator-fixed";
     64		regulator-name = "backlight-supply";
     65		regulator-min-microvolt = <15000000>;
     66		regulator-max-microvolt = <15000000>;
     67		regulator-always-on;
     68	};
     69};
     70
     71&fec {
     72	status = "okay";
     73};
     74
     75&i2c3 {
     76	adc@48 {
     77		compatible = "ti,ads1015";
     78		reg = <0x48>;
     79		#address-cells = <1>;
     80		#size-cells = <0>;
     81
     82		channel@4 {
     83			reg = <4>;
     84			ti,gain = <2>;
     85			ti,datarate = <4>;
     86		};
     87
     88		channel@6 {
     89			reg = <6>;
     90			ti,gain = <2>;
     91			ti,datarate = <4>;
     92		};
     93	};
     94
     95	gpio-expander2@21 {
     96		compatible = "nxp,pcf8574";
     97		reg = <0x21>;
     98		interrupts = <109>;
     99		#gpio-cells = <2>;
    100		gpio-controller;
    101	};
    102};
    103
    104&iomuxc {
    105	imx53-kp-ddc {
    106		pinctrl_disp: dispgrp {
    107			fsl,pins = <
    108				MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK      0x4
    109				MX53_PAD_EIM_DA10__IPU_DI1_PIN15        0x4
    110				MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0       0x4
    111				MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1       0x4
    112				MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2       0x4
    113				MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3       0x4
    114				MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4       0x4
    115				MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5       0x4
    116				MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6       0x4
    117				MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7       0x4
    118				MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8       0x4
    119				MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9       0x4
    120				MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10      0x4
    121				MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11      0x4
    122				MX53_PAD_EIM_A17__IPU_DISP1_DAT_12      0x4
    123				MX53_PAD_EIM_A18__IPU_DISP1_DAT_13      0x4
    124				MX53_PAD_EIM_A19__IPU_DISP1_DAT_14      0x4
    125				MX53_PAD_EIM_A20__IPU_DISP1_DAT_15      0x4
    126				MX53_PAD_EIM_A21__IPU_DISP1_DAT_16      0x4
    127				MX53_PAD_EIM_A22__IPU_DISP1_DAT_17      0x4
    128				MX53_PAD_EIM_A23__IPU_DISP1_DAT_18      0x4
    129				MX53_PAD_EIM_A24__IPU_DISP1_DAT_19      0x4
    130				MX53_PAD_EIM_D31__IPU_DISP1_DAT_20      0x4
    131				MX53_PAD_EIM_D30__IPU_DISP1_DAT_21      0x4
    132				MX53_PAD_EIM_D26__IPU_DISP1_DAT_22      0x4
    133				MX53_PAD_EIM_D27__IPU_DISP1_DAT_23      0x4
    134				MX53_PAD_GPIO_1__PWM2_PWMO 0x4
    135			>;
    136		};
    137	};
    138};
    139
    140&ipu_di1_disp1 {
    141	remote-endpoint = <&display1_in>;
    142};
    143
    144&pmic {
    145	fsl,mc13xxx-uses-touch;
    146};