cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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imx53-tx53-x03x.dts (9478B)


      1/*
      2 * Copyright 2013-2017 Lothar Waßmann <LW@KARO-electronics.de>
      3 *
      4 * This file is dual-licensed: you can use it either under the terms
      5 * of the GPL or the X11 license, at your option. Note that this dual
      6 * licensing only applies to this file, and not this project as a
      7 * whole.
      8 *
      9 *  a) This file is free software; you can redistribute it and/or
     10 *     modify it under the terms of the GNU General Public License
     11 *     version 2 as published by the Free Software Foundation.
     12 *
     13 *     This file is distributed in the hope that it will be useful,
     14 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
     15 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     16 *     GNU General Public License for more details.
     17 *
     18 * Or, alternatively,
     19 *
     20 *  b) Permission is hereby granted, free of charge, to any person
     21 *     obtaining a copy of this software and associated documentation
     22 *     files (the "Software"), to deal in the Software without
     23 *     restriction, including without limitation the rights to use,
     24 *     copy, modify, merge, publish, distribute, sublicense, and/or
     25 *     sell copies of the Software, and to permit persons to whom the
     26 *     Software is furnished to do so, subject to the following
     27 *     conditions:
     28 *
     29 *     The above copyright notice and this permission notice shall be
     30 *     included in all copies or substantial portions of the Software.
     31 *
     32 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     33 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     34 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     35 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
     36 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     37 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     38 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     39 *     OTHER DEALINGS IN THE SOFTWARE.
     40 */
     41
     42/dts-v1/;
     43#include "imx53-tx53.dtsi"
     44#include <dt-bindings/input/input.h>
     45#include <dt-bindings/interrupt-controller/irq.h>
     46#include <dt-bindings/pwm/pwm.h>
     47
     48/ {
     49	model = "Ka-Ro electronics TX53 module (LCD)";
     50	compatible = "karo,tx53", "fsl,imx53";
     51
     52	aliases {
     53		display = &display;
     54	};
     55
     56	display: disp0 {
     57		compatible = "fsl,imx-parallel-display";
     58		interface-pix-fmt = "rgb24";
     59		pinctrl-names = "default";
     60		pinctrl-0 = <&pinctrl_rgb24_vga1>;
     61		status = "okay";
     62
     63		port {
     64			display0_in: endpoint {
     65				remote-endpoint = <&ipu_di0_disp0>;
     66			};
     67		};
     68
     69		display-timings {
     70			VGA {
     71				clock-frequency = <25200000>;
     72				hactive = <640>;
     73				vactive = <480>;
     74				hback-porch = <48>;
     75				hsync-len = <96>;
     76				hfront-porch = <16>;
     77				vback-porch = <31>;
     78				vsync-len = <2>;
     79				vfront-porch = <12>;
     80				hsync-active = <0>;
     81				vsync-active = <0>;
     82				de-active = <1>;
     83				pixelclk-active = <0>;
     84			};
     85
     86			ETV570 {
     87				clock-frequency = <25200000>;
     88				hactive = <640>;
     89				vactive = <480>;
     90				hback-porch = <114>;
     91				hsync-len = <30>;
     92				hfront-porch = <16>;
     93				vback-porch = <32>;
     94				vsync-len = <3>;
     95				vfront-porch = <10>;
     96				hsync-active = <0>;
     97				vsync-active = <0>;
     98				de-active = <1>;
     99				pixelclk-active = <0>;
    100			};
    101
    102			ET0350 {
    103				clock-frequency = <6413760>;
    104				hactive = <320>;
    105				vactive = <240>;
    106				hback-porch = <34>;
    107				hsync-len = <34>;
    108				hfront-porch = <20>;
    109				vback-porch = <15>;
    110				vsync-len = <3>;
    111				vfront-porch = <4>;
    112				hsync-active = <0>;
    113				vsync-active = <0>;
    114				de-active = <1>;
    115				pixelclk-active = <0>;
    116			};
    117
    118			ET0430 {
    119				clock-frequency = <9009000>;
    120				hactive = <480>;
    121				vactive = <272>;
    122				hback-porch = <2>;
    123				hsync-len = <41>;
    124				hfront-porch = <2>;
    125				vback-porch = <2>;
    126				vsync-len = <10>;
    127				vfront-porch = <2>;
    128				hsync-active = <0>;
    129				vsync-active = <0>;
    130				de-active = <1>;
    131				pixelclk-active = <1>;
    132			};
    133
    134			ET0500 {
    135				clock-frequency = <33264000>;
    136				hactive = <800>;
    137				vactive = <480>;
    138				hback-porch = <88>;
    139				hsync-len = <128>;
    140				hfront-porch = <40>;
    141				vback-porch = <33>;
    142				vsync-len = <2>;
    143				vfront-porch = <10>;
    144				hsync-active = <0>;
    145				vsync-active = <0>;
    146				de-active = <1>;
    147				pixelclk-active = <0>;
    148			};
    149
    150			ET0700 { /* same as ET0500 */
    151				clock-frequency = <33264000>;
    152				hactive = <800>;
    153				vactive = <480>;
    154				hback-porch = <88>;
    155				hsync-len = <128>;
    156				hfront-porch = <40>;
    157				vback-porch = <33>;
    158				vsync-len = <2>;
    159				vfront-porch = <10>;
    160				hsync-active = <0>;
    161				vsync-active = <0>;
    162				de-active = <1>;
    163				pixelclk-active = <0>;
    164			};
    165
    166			ETQ570 {
    167				clock-frequency = <6596040>;
    168				hactive = <320>;
    169				vactive = <240>;
    170				hback-porch = <38>;
    171				hsync-len = <30>;
    172				hfront-porch = <30>;
    173				vback-porch = <16>;
    174				vsync-len = <3>;
    175				vfront-porch = <4>;
    176				hsync-active = <0>;
    177				vsync-active = <0>;
    178				de-active = <1>;
    179				pixelclk-active = <0>;
    180			};
    181		};
    182	};
    183
    184	backlight: backlight {
    185		compatible = "pwm-backlight";
    186		pwms = <&pwm2 0 500000 PWM_POLARITY_INVERTED>;
    187		power-supply = <&reg_3v3>;
    188		brightness-levels = <
    189			  0  1  2  3  4  5  6  7  8  9
    190			 10 11 12 13 14 15 16 17 18 19
    191			 20 21 22 23 24 25 26 27 28 29
    192			 30 31 32 33 34 35 36 37 38 39
    193			 40 41 42 43 44 45 46 47 48 49
    194			 50 51 52 53 54 55 56 57 58 59
    195			 60 61 62 63 64 65 66 67 68 69
    196			 70 71 72 73 74 75 76 77 78 79
    197			 80 81 82 83 84 85 86 87 88 89
    198			 90 91 92 93 94 95 96 97 98 99
    199			100
    200		>;
    201		default-brightness-level = <50>;
    202	};
    203
    204	reg_lcd_pwr: regulator-lcd-pwr {
    205		compatible = "regulator-fixed";
    206		regulator-name = "LCD POWER";
    207		regulator-min-microvolt = <3300000>;
    208		regulator-max-microvolt = <3300000>;
    209		gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
    210		enable-active-high;
    211		regulator-boot-on;
    212	};
    213
    214	reg_lcd_reset: regulator-lcd-reset {
    215		compatible = "regulator-fixed";
    216		regulator-name = "LCD RESET";
    217		regulator-min-microvolt = <3300000>;
    218		regulator-max-microvolt = <3300000>;
    219		gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
    220		enable-active-high;
    221		regulator-boot-on;
    222	};
    223};
    224
    225&i2c3 {
    226	pinctrl-names = "default";
    227	pinctrl-0 = <&pinctrl_i2c3>;
    228	status = "okay";
    229
    230	sgtl5000: codec@a {
    231		compatible = "fsl,sgtl5000";
    232		reg = <0x0a>;
    233		#sound-dai-cells = <0>;
    234		VDDA-supply = <&reg_2v5>;
    235		VDDIO-supply = <&reg_3v3>;
    236		clocks = <&mclk>;
    237	};
    238
    239	polytouch: edt-ft5x06@38 {
    240		compatible = "edt,edt-ft5x06";
    241		reg = <0x38>;
    242		pinctrl-names = "default";
    243		pinctrl-0 = <&pinctrl_edt_ft5x06_1>;
    244		interrupt-parent = <&gpio6>;
    245		interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
    246		reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
    247		wake-gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
    248		wakeup-source;
    249	};
    250
    251	touchscreen: tsc2007@48 {
    252		compatible = "ti,tsc2007";
    253		reg = <0x48>;
    254		pinctrl-names = "default";
    255		pinctrl-0 = <&pinctrl_tsc2007>;
    256		interrupt-parent = <&gpio3>;
    257		interrupts = <26 IRQ_TYPE_EDGE_FALLING>;
    258		gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
    259		ti,x-plate-ohms = <660>;
    260		wakeup-source;
    261	};
    262};
    263
    264&iomuxc {
    265	imx53-tx53-x03x {
    266		pinctrl_edt_ft5x06_1: edt-ft5x06grp-1 {
    267			fsl,pins = <
    268				MX53_PAD_NANDF_CS2__GPIO6_15 0x1f0 /* Interrupt */
    269				MX53_PAD_EIM_A16__GPIO2_22   0x04 /* Reset */
    270				MX53_PAD_EIM_A17__GPIO2_21   0x04 /* Wake */
    271			>;
    272		};
    273
    274		pinctrl_kpp: kppgrp {
    275			fsl,pins = <
    276				MX53_PAD_GPIO_9__KPP_COL_6 0x1f4
    277				MX53_PAD_GPIO_4__KPP_COL_7 0x1f4
    278				MX53_PAD_KEY_COL2__KPP_COL_2 0x1f4
    279				MX53_PAD_KEY_COL3__KPP_COL_3 0x1f4
    280				MX53_PAD_GPIO_2__KPP_ROW_6 0x1f4
    281				MX53_PAD_GPIO_5__KPP_ROW_7 0x1f4
    282				MX53_PAD_KEY_ROW2__KPP_ROW_2 0x1f4
    283				MX53_PAD_KEY_ROW3__KPP_ROW_3 0x1f4
    284			>;
    285		};
    286
    287		pinctrl_rgb24_vga1: rgb24-vgagrp1 {
    288			fsl,pins = <
    289				MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK		0x5
    290				MX53_PAD_DI0_PIN15__IPU_DI0_PIN15		0x5
    291				MX53_PAD_DI0_PIN2__IPU_DI0_PIN2			0x5
    292				MX53_PAD_DI0_PIN3__IPU_DI0_PIN3			0x5
    293				MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0		0x5
    294				MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1		0x5
    295				MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2		0x5
    296				MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3		0x5
    297				MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4		0x5
    298				MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5		0x5
    299				MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6		0x5
    300				MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7		0x5
    301				MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8		0x5
    302				MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9		0x5
    303				MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10		0x5
    304				MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11		0x5
    305				MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12		0x5
    306				MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13		0x5
    307				MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14		0x5
    308				MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15		0x5
    309				MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16		0x5
    310				MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17		0x5
    311				MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18		0x5
    312				MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19		0x5
    313				MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20		0x5
    314				MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21		0x5
    315				MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22		0x5
    316				MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23		0x5
    317			>;
    318		};
    319
    320		pinctrl_tsc2007: tsc2007grp {
    321			fsl,pins = <
    322				MX53_PAD_EIM_D26__GPIO3_26 0x1f0 /* Interrupt */
    323			>;
    324		};
    325	};
    326};
    327
    328&ipu_di0_disp0 {
    329	remote-endpoint = <&display0_in>;
    330};
    331
    332&kpp {
    333	pinctrl-names = "default";
    334	pinctrl-0 = <&pinctrl_kpp>;
    335	/* sample keymap */
    336	/* row/col 0,1 are mapped to KPP row/col 6,7 */
    337	linux,keymap = <
    338		MATRIX_KEY(6, 6, KEY_POWER)
    339		MATRIX_KEY(6, 7, KEY_KP0)
    340		MATRIX_KEY(6, 2, KEY_KP1)
    341		MATRIX_KEY(6, 3, KEY_KP2)
    342		MATRIX_KEY(7, 6, KEY_KP3)
    343		MATRIX_KEY(7, 7, KEY_KP4)
    344		MATRIX_KEY(7, 2, KEY_KP5)
    345		MATRIX_KEY(7, 3, KEY_KP6)
    346		MATRIX_KEY(2, 6, KEY_KP7)
    347		MATRIX_KEY(2, 7, KEY_KP8)
    348		MATRIX_KEY(2, 2, KEY_KP9)
    349	>;
    350	status = "okay";
    351};