cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

imx6dl-b1x5v2.dtsi (1456B)

      1// SPDX-License-Identifier: GPL-2.0 or MIT
      2//
      3// Device Tree Source for General Electric B1x5v2
      4// patient monitor series
      5//
      6// Copyright 2018-2021 General Electric Company
      7// Copyright 2018-2021 Collabora
      8
      9#include <dt-bindings/input/input.h>
     10#include "imx6dl-b1x5pv2.dtsi"
     11
     12/ {
     13	reg_3v3_acm: regulator-3v3-acm {
     14		compatible = "regulator-fixed";
     15		regulator-name = "3V3 ACM";
     16		regulator-min-microvolt = <3300000>;
     17		regulator-max-microvolt = <3300000>;
     18		regulator-always-on;
     19		vin-supply = <&reg_3v3>;
     20	};
     21};
     22
     23&i2c1 {
     24	tca6416: gpio-controller@21 {
     25		compatible = "ti,tca6416";
     26		reg = <0x21>;
     27		gpio-controller;
     28		#gpio-cells = <2>;
     29		reset-gpios = <&tca6424a 9 GPIO_ACTIVE_LOW>;
     30		vcc-supply = <&reg_3v3_acm>;
     31		gpio-line-names = "ACM1_EN", "ACM1_CL0", "ACM1_CL1", "ACM1_CL2",
     32				  "", "ACM2_EN", "ACM2_CL0", "ACM2_CL1",
     33				  "ACM2_CL2", "", "", "",
     34				  "", "", "", "";
     35
     36		/*
     37		 * The interrupt pin is connected to &tca6424a pin 1, but the Linux
     38		 * TCA6424 driver cannot handle low type interrupts at the moment
     39		 * (and support cannot be added without some ugly hacks). Since this
     40		 * controller does not have any input type GPIOs, just pretend
     41		 * that the interrupt pin is unconnected.
     42		 */
     43	};
     44};
     45
     46&i2c5 {
     47	mpl3115a2: pressure-sensor@60 {
     48		compatible = "fsl,mpl3115";
     49		reg = <0x60>;
     50
     51		/*
     52		 * The MPL3115 interrupts are connected to pin 22 and 23
     53		 * of &tca6424a, but the binding does not yet support
     54		 * interrupts.
     55		 */
     56	};
     57};