cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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imx6dl-prtvt7.dts (12444B)


      1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
      2/*
      3 * Copyright (c) 2016 Protonic Holland
      4 */
      5
      6/dts-v1/;
      7#include "imx6dl.dtsi"
      8#include "imx6qdl-prti6q.dtsi"
      9#include <dt-bindings/display/sdtv-standards.h>
     10#include <dt-bindings/input/input.h>
     11#include <dt-bindings/leds/common.h>
     12#include <dt-bindings/sound/fsl-imx-audmux.h>
     13
     14/ {
     15	model = "Protonic VT7";
     16	compatible = "prt,prtvt7", "fsl,imx6dl";
     17
     18	memory@10000000 {
     19		device_type = "memory";
     20		reg = <0x10000000 0x20000000>;
     21	};
     22
     23	backlight_lcd: backlight-lcd {
     24		compatible = "pwm-backlight";
     25		pwms = <&pwm1 0 500000 0>;
     26		brightness-levels = <0 20 81 248 1000>;
     27		default-brightness-level = <20>;
     28		num-interpolated-steps = <21>;
     29		power-supply = <&reg_bl_12v0>;
     30	};
     31
     32	display {
     33		compatible = "fsl,imx-parallel-display";
     34		pinctrl-0 = <&pinctrl_ipu1_disp>;
     35		pinctrl-names = "default";
     36		#address-cells = <1>;
     37		#size-cells = <0>;
     38
     39		port@0 {
     40			reg = <0>;
     41
     42			display_in: endpoint {
     43				remote-endpoint = <&ipu1_di0_disp0>;
     44			};
     45		};
     46
     47		port@1 {
     48			reg = <1>;
     49
     50			display_out: endpoint {
     51				remote-endpoint = <&panel_in>;
     52			};
     53		};
     54	};
     55
     56	iio-hwmon {
     57		compatible = "iio-hwmon";
     58		io-channels = <&vdiv_vaccu>;
     59	};
     60
     61	keys {
     62		compatible = "gpio-keys";
     63		autorepeat;
     64
     65		esc {
     66			label = "GPIO Key ESC";
     67			linux,code = <KEY_ESC>;
     68			gpios = <&gpio_pca 0 GPIO_ACTIVE_LOW>;
     69		};
     70
     71		up {
     72			label = "GPIO Key UP";
     73			linux,code = <KEY_UP>;
     74			gpios = <&gpio_pca 1 GPIO_ACTIVE_LOW>;
     75		};
     76
     77		down {
     78			label = "GPIO Key DOWN";
     79			linux,code = <KEY_DOWN>;
     80			gpios = <&gpio_pca 4 GPIO_ACTIVE_LOW>;
     81		};
     82
     83		enter {
     84			label = "GPIO Key Enter";
     85			linux,code = <KEY_ENTER>;
     86			gpios = <&gpio_pca 3 GPIO_ACTIVE_LOW>;
     87		};
     88
     89		cycle {
     90			label = "GPIO Key CYCLE";
     91			linux,code = <KEY_CYCLEWINDOWS>;
     92			gpios = <&gpio_pca 2 GPIO_ACTIVE_LOW>;
     93		};
     94
     95		f1 {
     96			label = "GPIO Key F1";
     97			linux,code = <KEY_F1>;
     98			gpios = <&gpio_pca 14 GPIO_ACTIVE_LOW>;
     99		};
    100
    101		f2 {
    102			label = "GPIO Key F2";
    103			linux,code = <KEY_F2>;
    104			gpios = <&gpio_pca 13 GPIO_ACTIVE_LOW>;
    105		};
    106
    107		f3 {
    108			label = "GPIO Key F3";
    109			linux,code = <KEY_F3>;
    110			gpios = <&gpio_pca 12 GPIO_ACTIVE_LOW>;
    111		};
    112
    113		f4 {
    114			label = "GPIO Key F4";
    115			linux,code = <KEY_F4>;
    116			gpios = <&gpio_pca 11 GPIO_ACTIVE_LOW>;
    117		};
    118
    119		f5 {
    120			label = "GPIO Key F5";
    121			linux,code = <KEY_F5>;
    122			gpios = <&gpio_pca 10 GPIO_ACTIVE_LOW>;
    123		};
    124
    125		f6 {
    126			label = "GPIO Key F6";
    127			linux,code = <KEY_F6>;
    128			gpios = <&gpio_pca 5 GPIO_ACTIVE_LOW>;
    129		};
    130
    131		f7 {
    132			label = "GPIO Key F7";
    133			linux,code = <KEY_F7>;
    134			gpios = <&gpio_pca 6 GPIO_ACTIVE_LOW>;
    135		};
    136
    137		f8 {
    138			label = "GPIO Key F8";
    139			linux,code = <KEY_F8>;
    140			gpios = <&gpio_pca 7 GPIO_ACTIVE_LOW>;
    141		};
    142
    143		f9 {
    144			label = "GPIO Key F9";
    145			linux,code = <KEY_F9>;
    146			gpios = <&gpio_pca 8 GPIO_ACTIVE_LOW>;
    147		};
    148
    149		f10 {
    150			label = "GPIO Key F10";
    151			linux,code = <KEY_F10>;
    152			gpios = <&gpio_pca 9 GPIO_ACTIVE_LOW>;
    153		};
    154	};
    155
    156	leds {
    157		compatible = "gpio-leds";
    158		pinctrl-names = "default";
    159		pinctrl-0 = <&pinctrl_leds>;
    160
    161		led-debug0 {
    162			function = LED_FUNCTION_STATUS;
    163			gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
    164			linux,default-trigger = "heartbeat";
    165		};
    166	};
    167
    168	panel {
    169		compatible = "innolux,g070y2-t02";
    170		backlight = <&backlight_lcd>;
    171		power-supply = <&reg_3v3>;
    172
    173		port {
    174			panel_in: endpoint {
    175				remote-endpoint = <&display_out>;
    176			};
    177		};
    178	};
    179
    180	connector {
    181		compatible = "composite-video-connector";
    182		label = "Composite0";
    183		sdtv-standards = <SDTV_STD_PAL_B>;
    184
    185		port {
    186			comp0_out: endpoint {
    187				remote-endpoint = <&tvp5150_comp0_in>;
    188			};
    189		};
    190	};
    191
    192	reg_bl_12v0: regulator-bl-12v0 {
    193		compatible = "regulator-fixed";
    194		pinctrl-names = "default";
    195		pinctrl-0 = <&pinctrl_reg_bl_12v0>;
    196		regulator-name = "bl-12v0";
    197		regulator-min-microvolt = <12000000>;
    198		regulator-max-microvolt = <12000000>;
    199		gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
    200		enable-active-high;
    201	};
    202
    203	reg_3v3: regulator-3v3 {
    204		compatible = "regulator-fixed";
    205		regulator-name = "3v3";
    206		regulator-min-microvolt = <3300000>;
    207		regulator-max-microvolt = <3300000>;
    208	};
    209
    210	reg_1v8: regulator-1v8 {
    211		compatible = "regulator-fixed";
    212		regulator-name = "1v8";
    213		regulator-min-microvolt = <1800000>;
    214		regulator-max-microvolt = <1800000>;
    215	};
    216
    217	sound {
    218		compatible = "simple-audio-card";
    219		simple-audio-card,name = "prti6q-sgtl5000";
    220		simple-audio-card,format = "i2s";
    221		simple-audio-card,widgets =
    222			"Microphone", "Microphone Jack",
    223			"Line", "Line In Jack",
    224			"Headphone", "Headphone Jack",
    225			"Speaker", "External Speaker";
    226		simple-audio-card,routing =
    227			"MIC_IN", "Microphone Jack",
    228			"LINE_IN", "Line In Jack",
    229			"Headphone Jack", "HP_OUT",
    230			"External Speaker", "LINE_OUT";
    231
    232		simple-audio-card,cpu {
    233			sound-dai = <&ssi1>;
    234			system-clock-frequency = <0>;
    235		};
    236
    237		simple-audio-card,codec {
    238			sound-dai = <&sgtl5000>;
    239			bitclock-master;
    240			frame-master;
    241		};
    242	};
    243
    244	thermal-zones {
    245		chassis-thermal {
    246			polling-delay = <20000>;
    247			polling-delay-passive = <0>;
    248			thermal-sensors = <&tsens0>;
    249		};
    250
    251		touch-thermal0 {
    252			polling-delay = <20000>;
    253			polling-delay-passive = <0>;
    254			thermal-sensors = <&touch_temp0>;
    255		};
    256
    257		touch-thermal1 {
    258			polling-delay = <20000>;
    259			polling-delay-passive = <0>;
    260			thermal-sensors = <&touch_temp1>;
    261		};
    262	};
    263
    264	touchscreen {
    265		compatible = "resistive-adc-touch";
    266		io-channels = <&adc_ts 1>, <&adc_ts 3>, <&adc_ts 4>,
    267                              <&adc_ts 5>;
    268		io-channel-names = "y", "z1", "z2", "x";
    269		touchscreen-min-pressure = <64687>;
    270		touchscreen-inverted-x;
    271		touchscreen-inverted-y;
    272		touchscreen-x-plate-ohms = <300>;
    273		touchscreen-y-plate-ohms = <800>;
    274	};
    275
    276	touch_temp0: touch-temperature-sensor0 {
    277		compatible = "generic-adc-thermal";
    278		#thermal-sensor-cells = <0>;
    279		io-channels = <&adc_ts 0>;
    280		io-channel-names = "sensor-channel";
    281		temperature-lookup-table = <    (-40000) 736
    282						85000 474>;
    283	};
    284
    285	touch_temp1: touch-temperature-sensor1 {
    286		compatible = "generic-adc-thermal";
    287		#thermal-sensor-cells = <0>;
    288		io-channels = <&adc_ts 7>;
    289		io-channel-names = "sensor-channel";
    290		temperature-lookup-table = <    (-40000) 826
    291						85000 609>;
    292	};
    293
    294	vdiv_vaccu: voltage-divider-vaccu {
    295		compatible = "voltage-divider";
    296		io-channels = <&adc_ts 2>;
    297		output-ohms = <2500>;
    298		full-ohms = <64000>;
    299		#io-channel-cells = <0>;
    300	};
    301};
    302
    303&audmux {
    304	pinctrl-names = "default";
    305	pinctrl-0 = <&pinctrl_audmux>;
    306	status = "okay";
    307
    308	mux-ssi1 {
    309		fsl,audmux-port = <0>;
    310		fsl,port-config = <
    311			IMX_AUDMUX_V2_PTCR_SYN		0
    312			IMX_AUDMUX_V2_PTCR_TFSEL(2)	0
    313			IMX_AUDMUX_V2_PTCR_TCSEL(2)	0
    314			IMX_AUDMUX_V2_PTCR_TFSDIR	0
    315			IMX_AUDMUX_V2_PTCR_TCLKDIR IMX_AUDMUX_V2_PDCR_RXDSEL(2)
    316		>;
    317	};
    318
    319	mux-pins3 {
    320		fsl,audmux-port = <2>;
    321		fsl,port-config = <
    322			IMX_AUDMUX_V2_PTCR_SYN IMX_AUDMUX_V2_PDCR_RXDSEL(0)
    323			0		       IMX_AUDMUX_V2_PDCR_TXRXEN
    324		>;
    325	};
    326};
    327
    328&can1 {
    329	pinctrl-0 = <&pinctrl_can1 &pinctrl_can1phy>;
    330};
    331
    332&clks {
    333	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>;
    334	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
    335};
    336
    337&ecspi2 {
    338	cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
    339	pinctrl-names = "default";
    340	pinctrl-0 = <&pinctrl_ecspi2>;
    341	status = "okay";
    342
    343	adc_ts: adc@0 {
    344		compatible = "ti,tsc2046e-adc";
    345		reg = <0>;
    346		pinctrl-0 = <&pinctrl_tsc>;
    347		pinctrl-names ="default";
    348		spi-max-frequency = <1000000>;
    349		interrupts-extended = <&gpio3 20 IRQ_TYPE_LEVEL_LOW>;
    350		#io-channel-cells = <1>;
    351
    352		#address-cells = <1>;
    353		#size-cells = <0>;
    354
    355		channel@1 {
    356			reg = <1>;
    357			settling-time-us = <700>;
    358			oversampling-ratio = <5>;
    359		};
    360
    361		channel@3 {
    362			reg = <3>;
    363			settling-time-us = <700>;
    364			oversampling-ratio = <5>;
    365		};
    366
    367		channel@4 {
    368			reg = <4>;
    369			settling-time-us = <700>;
    370			oversampling-ratio = <5>;
    371		};
    372
    373		channel@5 {
    374			reg = <5>;
    375			settling-time-us = <700>;
    376			oversampling-ratio = <5>;
    377		};
    378	};
    379};
    380
    381&i2c1 {
    382	sgtl5000: audio-codec@a {
    383		compatible = "fsl,sgtl5000";
    384		reg = <0xa>;
    385		pinctrl-names = "default";
    386		pinctrl-0 = <&pinctrl_codec>;
    387		#sound-dai-cells = <0>;
    388		clocks = <&clks 201>;
    389		VDDA-supply = <&reg_3v3>;
    390		VDDIO-supply = <&reg_3v3>;
    391		VDDD-supply = <&reg_1v8>;
    392	};
    393
    394	video@5c {
    395		compatible = "ti,tvp5150";
    396		reg = <0x5c>;
    397
    398		#address-cells = <1>;
    399		#size-cells = <0>;
    400
    401		port@0 {
    402			reg = <0>;
    403
    404			tvp5150_comp0_in: endpoint {
    405				remote-endpoint = <&comp0_out>;
    406			};
    407		};
    408
    409		/* Output port 2 is video output pad */
    410		port@2 {
    411			reg = <2>;
    412
    413			tvp5151_to_ipu1_csi0_mux: endpoint {
    414				remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
    415			};
    416		};
    417	};
    418};
    419
    420&i2c3 {
    421	rtc@51 {
    422		compatible = "nxp,pcf8563";
    423		reg = <0x51>;
    424	};
    425
    426	tsens0: temperature-sensor@70 {
    427		compatible = "ti,tmp103";
    428		reg = <0x70>;
    429		#thermal-sensor-cells = <0>;
    430	};
    431
    432	gpio_pca: gpio@74 {
    433		compatible = "nxp,pca9539";
    434		reg = <0x74>;
    435		interrupts-extended = <&gpio4 5 IRQ_TYPE_LEVEL_LOW>;
    436		#gpio-cells = <2>;
    437		gpio-controller;
    438	};
    439};
    440
    441&ipu1 {
    442	pinctrl-names = "default";
    443	pinctrl-0 = <&pinctrl_ipu1_csi0>;
    444	status = "okay";
    445};
    446
    447&ipu1_di0_disp0 {
    448	remote-endpoint = <&display_in>;
    449};
    450
    451&ipu1_csi0_mux_from_parallel_sensor {
    452	remote-endpoint = <&tvp5151_to_ipu1_csi0_mux>;
    453};
    454
    455&pwm1 {
    456	pinctrl-names = "default";
    457	pinctrl-0 = <&pinctrl_pwm1>;
    458	status = "okay";
    459};
    460
    461&snvs_poweroff {
    462	status = "okay";
    463};
    464
    465&snvs_pwrkey {
    466	status = "okay";
    467};
    468
    469&ssi1 {
    470	status = "okay";
    471};
    472
    473&usbh1 {
    474	status = "disabled";
    475};
    476
    477&iomuxc {
    478	pinctrl_audmux: audmuxgrp {
    479		fsl,pins = <
    480			MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1		0x030b0
    481			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0
    482			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0
    483			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0
    484			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0
    485		>;
    486	};
    487
    488	pinctrl_can1phy: can1phy {
    489		fsl,pins = <
    490			/* CAN1_SR */
    491			MX6QDL_PAD_KEY_COL3__GPIO4_IO12		0x13070
    492			/* CAN1_TERM */
    493			MX6QDL_PAD_GPIO_0__GPIO1_IO00		0x1b0b0
    494		>;
    495	};
    496
    497	pinctrl_codec: codecgrp {
    498		fsl,pins = <
    499			/* AUDIO_nRESET */
    500			MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21	0x1f0b0
    501		>;
    502	};
    503
    504	pinctrl_ecspi2: ecspi2grp {
    505		fsl,pins = <
    506			MX6QDL_PAD_EIM_OE__ECSPI2_MISO		0x100b1
    507			MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK		0x100b1
    508			MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI		0x100b1
    509			MX6QDL_PAD_EIM_RW__GPIO2_IO26		0x000b1
    510		>;
    511	};
    512
    513	pinctrl_ipu1_csi0: ipu1csi0grp {
    514		fsl,pins = <
    515			MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12	0x1b0b0
    516			MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13	0x1b0b0
    517			MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14	0x1b0b0
    518			MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15	0x1b0b0
    519			MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16	0x1b0b0
    520			MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17	0x1b0b0
    521			MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18	0x1b0b0
    522			MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19	0x1b0b0
    523			MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
    524			/* ITU656_nRESET */
    525			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x1b0b0
    526			/* ITU656_nPDN */
    527			MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20	0x1b0b0
    528		>;
    529	};
    530
    531	pinctrl_ipu1_disp: ipudisp1grp {
    532		fsl,pins = <
    533			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0xb0
    534			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15	   0xb0
    535
    536			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0xb0
    537			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0xb0
    538			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0xb0
    539			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0xb0
    540			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0xb0
    541			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0xb0
    542			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0xb0
    543			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0xb0
    544
    545			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0xb0
    546			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0xb0
    547			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0xb0
    548			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0xb0
    549			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0xb0
    550			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0xb0
    551			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0xb0
    552			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0xb0
    553
    554			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0xb0
    555			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0xb0
    556			MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0xb0
    557			MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0xb0
    558			MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0xb0
    559			MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0xb0
    560			MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0xb0
    561			MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0xb0
    562		>;
    563	};
    564
    565	pinctrl_leds: ledsgrp {
    566		fsl,pins = <
    567			MX6QDL_PAD_GPIO_8__GPIO1_IO08		0x1b0b0
    568		>;
    569	};
    570
    571	pinctrl_pwm1: pwm1grp {
    572		fsl,pins = <
    573			MX6QDL_PAD_GPIO_9__PWM1_OUT		0x1b0b0
    574		>;
    575	};
    576
    577	pinctrl_reg_bl_12v0: 12blgrp {
    578		fsl,pins = <
    579			MX6QDL_PAD_GPIO_7__GPIO1_IO07		0x1b0b0
    580		>;
    581	};
    582
    583	pinctrl_tsc: tscgrp {
    584
    585		fsl,pins = <
    586			MX6QDL_PAD_EIM_D20__GPIO3_IO20		0x1b0b0
    587			MX6QDL_PAD_EIM_EB2__GPIO2_IO30		0x1b0b0
    588		>;
    589	};
    590};