cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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imx6q-prtwd2.dts (3779B)


      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * Copyright (c) 2018 Protonic Holland
      4 */
      5
      6/dts-v1/;
      7#include "imx6q.dtsi"
      8#include "imx6qdl-prti6q.dtsi"
      9#include <dt-bindings/leds/common.h>
     10
     11/ {
     12	model = "Protonic WD2 board";
     13	compatible = "prt,prtwd2", "fsl,imx6q";
     14
     15	memory@10000000 {
     16		device_type = "memory";
     17		reg = <0x10000000 0x20000000>;
     18	};
     19
     20	memory@80000000 {
     21		device_type = "memory";
     22		reg = <0x80000000 0x20000000>;
     23	};
     24
     25	usdhc2_wifi_pwrseq: usdhc2_wifi_pwrseq {
     26		compatible = "mmc-pwrseq-simple";
     27		pinctrl-names = "default";
     28		pinctrl-0 = <&pinctrl_wifi_npd>;
     29		reset-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>;
     30	};
     31
     32	/* PRTWD2 rev 1 bitbang I2C for Ethernet Switch */
     33	i2c {
     34		compatible = "i2c-gpio";
     35		pinctrl-names = "default";
     36		pinctrl-0 = <&pinctrl_i2c4>;
     37		sda-gpios = <&gpio1 22 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
     38		scl-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
     39		i2c-gpio,delay-us = <20>;	/* ~10 kHz */
     40		i2c-gpio,scl-output-only;
     41		#address-cells = <1>;
     42		#size-cells = <0>;
     43	};
     44};
     45
     46&can1 {
     47	pinctrl-names = "default";
     48	pinctrl-0 = <&pinctrl_can1 &pinctrl_can1phy>;
     49	status = "okay";
     50};
     51
     52&fec {
     53	pinctrl-names = "default";
     54	pinctrl-0 = <&pinctrl_enet>;
     55	phy-mode = "rmii";
     56	clocks = <&clks IMX6QDL_CLK_ENET>,
     57		 <&clks IMX6QDL_CLK_ENET>;
     58	clock-names = "ipg", "ahb";
     59	status = "okay";
     60
     61	fixed-link {
     62		speed = <100>;
     63		pause;
     64		full-duplex;
     65	};
     66};
     67
     68&i2c3 {
     69	adc@49 {
     70		compatible = "ti,ads1015";
     71		reg = <0x49>;
     72		#address-cells = <1>;
     73		#size-cells = <0>;
     74
     75		/* V in */
     76		channel@4 {
     77			reg = <4>;
     78			ti,gain = <1>;
     79			ti,datarate = <3>;
     80		};
     81
     82		/* I charge */
     83		channel@5 {
     84			reg = <5>;
     85			ti,gain = <1>;
     86			ti,datarate = <3>;
     87		};
     88
     89		/* V bus  */
     90		channel@6 {
     91			reg = <6>;
     92			ti,gain = <1>;
     93			ti,datarate = <3>;
     94		};
     95
     96		/* nc */
     97		channel@7 {
     98			reg = <7>;
     99			ti,gain = <1>;
    100			ti,datarate = <3>;
    101		};
    102	};
    103};
    104
    105&usdhc2 {
    106	pinctrl-names = "default";
    107	pinctrl-0 = <&pinctrl_usdhc2>;
    108	no-1-8-v;
    109	non-removable;
    110	mmc-pwrseq = <&usdhc2_wifi_pwrseq>;
    111	#address-cells = <1>;
    112	#size-cells = <0>;
    113	status = "okay";
    114
    115	wifi@1 {
    116		compatible = "brcm,bcm4329-fmac";
    117		reg = <1>;
    118	};
    119};
    120
    121&iomuxc {
    122	pinctrl-names = "default";
    123	pinctrl-0 = <&pinctrl_usb_eth_chg>;
    124
    125	pinctrl_can1phy: can1phy {
    126		fsl,pins = <
    127			/* CAN1_SR */
    128			MX6QDL_PAD_KEY_COL3__GPIO4_IO12	0x13070
    129		>;
    130	};
    131
    132	pinctrl_enet: enetgrp {
    133		fsl,pins = <
    134			/* MX6QDL_ENET_PINGRP4 */
    135			MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0	0x1b0b0
    136			MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1	0x1b0b0
    137			MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER	0x130b0
    138			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0
    139			MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0	0x1b0b0
    140			MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1	0x1b0b0
    141			MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN	0x1b0b0
    142
    143			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x1b0b0
    144			/* Phy reset */
    145			MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22	0x1b0b0
    146			/* nINTRP */
    147			MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23	0x1b0b0
    148
    149			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x10030
    150			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x10030
    151		>;
    152	};
    153
    154	pinctrl_i2c4: i2c4grp {
    155		fsl,pins = <
    156			MX6QDL_PAD_ENET_MDIO__GPIO1_IO22	0x1f8b0
    157			MX6QDL_PAD_ENET_MDC__GPIO1_IO31		0x1f8b0
    158		>;
    159	};
    160
    161	pinctrl_usb_eth_chg: usbethchggrp {
    162		fsl,pins = <
    163			/* USB charging control */
    164			MX6QDL_PAD_NANDF_CS0__GPIO6_IO11	0x130b0
    165			MX6QDL_PAD_NANDF_CS1__GPIO6_IO14	0x130b0
    166			MX6QDL_PAD_NANDF_CS2__GPIO6_IO15	0x130b0
    167			MX6QDL_PAD_NANDF_CS3__GPIO6_IO16	0x130b0
    168			>;
    169	};
    170
    171	pinctrl_usdhc2: usdhc2grp {
    172		fsl,pins = <
    173			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x170b9
    174			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x100b9
    175			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x170b9
    176			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x170b9
    177			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x170b9
    178			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x170b9
    179		>;
    180	};
    181
    182	pinctrl_wifi_npd: wifinpd {
    183		fsl,pins = <
    184			/* WL_REG_ON */
    185			MX6QDL_PAD_NANDF_RB0__GPIO6_IO10	0x13069
    186		>;
    187	};
    188};