cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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imx6q-skov-reve-mi1010ait-1cp1.dts (2566B)

      1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
      2//
      3// Copyright (C) 2020 Pengutronix, Ulrich Oelmann <kernel@pengutronix.de>
      4
      5/dts-v1/;
      6#include "imx6q.dtsi"
      7#include "imx6qdl-skov-cpu.dtsi"
      8
      9/ {
     10	model = "SKOV IMX6 CPU QuadCore";
     11	compatible = "skov,imx6q-skov-reve-mi1010ait-1cp1", "fsl,imx6q";
     12
     13	backlight: backlight {
     14		compatible = "pwm-backlight";
     15		pinctrl-names = "default";
     16		pinctrl-0 = <&pinctrl_backlight>;
     17		enable-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>;
     18		pwms = <&pwm2 0 20000 0>;
     19		brightness-levels = <0 255>;
     20		num-interpolated-steps = <17>;
     21		default-brightness-level = <8>;
     22		power-supply = <&reg_24v0>;
     23	};
     24
     25	panel {
     26		compatible = "multi-inno,mi1010ait-1cp";
     27		backlight = <&backlight>;
     28		power-supply = <&reg_3v3>;
     29
     30		port {
     31			panel_in: endpoint {
     32				remote-endpoint = <&lvds0_out>;
     33			};
     34		};
     35	};
     36};
     37
     38&clks {
     39	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
     40			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
     41	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
     42				 <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
     43};
     44
     45&hdmi {
     46	ddc-i2c-bus = <&i2c2>;
     47	status = "okay";
     48};
     49
     50&i2c1 {
     51	pinctrl-names = "default";
     52	pinctrl-0 = <&pinctrl_i2c1>;
     53	clock-frequency = <100000>;
     54	status = "okay";
     55
     56	touchscreen@38 {
     57		compatible = "edt,edt-ft5406";
     58		reg = <0x38>;
     59		pinctrl-names = "default";
     60		pinctrl-0 = <&pinctrl_touchscreen>;
     61		interrupt-parent = <&gpio3>;
     62		interrupts = <19 IRQ_TYPE_EDGE_FALLING>;
     63		reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
     64		touchscreen-size-x = <1280>;
     65		touchscreen-size-y = <800>;
     66		wakeup-source;
     67	};
     68};
     69
     70&i2c2 {
     71	pinctrl-names = "default";
     72	pinctrl-0 = <&pinctrl_i2c2>;
     73	clock-frequency = <100000>;
     74	status = "okay";
     75};
     76
     77&ldb {
     78	status = "okay";
     79
     80	lvds-channel@0 {
     81		status = "okay";
     82
     83		port@4 {
     84			reg = <4>;
     85
     86			lvds0_out: endpoint {
     87				remote-endpoint = <&panel_in>;
     88			};
     89		};
     90	};
     91};
     92
     93&iomuxc {
     94	pinctrl_backlight: backlightgrp {
     95		fsl,pins = <
     96			MX6QDL_PAD_RGMII_TD3__GPIO6_IO23		0x58
     97		>;
     98	};
     99
    100	pinctrl_i2c1: i2c1grp {
    101		fsl,pins = <
    102			/* external 1 k pull up */
    103			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x40010878
    104			/* external 1 k pull up */
    105			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x40010878
    106		>;
    107	};
    108
    109	pinctrl_i2c2: i2c2grp {
    110		fsl,pins = <
    111			/* internal 22 k pull up required */
    112			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001F878
    113			/* internal 22 k pull up required */
    114			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001F878
    115		>;
    116	};
    117
    118	pinctrl_touchscreen: touchscreengrp {
    119		fsl,pins = <
    120			/* external 10 k pull up */
    121			/* CTP_INT */
    122			MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x1b0b0
    123			/* CTP_RST */
    124			MX6QDL_PAD_EIM_D23__GPIO3_IO23		0x1b0b0
    125		>;
    126	};
    127};