cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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imx6qdl-prti6q.dtsi (3408B)

      1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
      2/*
      3 * Copyright (c) 2014 Protonic Holland
      4 */
      5
      6#include <dt-bindings/gpio/gpio.h>
      7#include <dt-bindings/input/input.h>
      8
      9/ {
     10	chosen {
     11		stdout-path = &uart4;
     12	};
     13
     14	reg_3v3: regulator-3v3 {
     15		compatible = "regulator-fixed";
     16		regulator-name = "3v3";
     17		regulator-min-microvolt = <3300000>;
     18		regulator-max-microvolt = <3300000>;
     19	};
     20
     21	reg_usb_h1_vbus: regulator-h1-vbus {
     22		compatible = "regulator-fixed";
     23		regulator-name = "h1-vbus";
     24		regulator-min-microvolt = <5000000>;
     25		regulator-max-microvolt = <5000000>;
     26	};
     27
     28	reg_usb_otg_vbus: regulator-otg-vbus {
     29		compatible = "regulator-fixed";
     30		regulator-name = "otg-vbus";
     31		regulator-min-microvolt = <5000000>;
     32		regulator-max-microvolt = <5000000>;
     33		gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
     34		enable-active-high;
     35	};
     36};
     37
     38&can1 {
     39	pinctrl-names = "default";
     40	status = "okay";
     41};
     42
     43&i2c1 {
     44	clock-frequency = <100000>;
     45	pinctrl-names = "default";
     46	pinctrl-0 = <&pinctrl_i2c1>;
     47	status = "okay";
     48};
     49
     50&i2c3 {
     51	clock-frequency = <100000>;
     52	pinctrl-names = "default";
     53	pinctrl-0 = <&pinctrl_i2c3>;
     54	status = "okay";
     55
     56	temperature-sensor@70 {
     57		compatible = "ti,tmp103";
     58		reg = <0x70>;
     59	};
     60};
     61
     62&uart4 {
     63	pinctrl-names = "default";
     64	pinctrl-0 = <&pinctrl_uart4>;
     65	status = "okay";
     66};
     67
     68&usbh1 {
     69	vbus-supply = <&reg_usb_h1_vbus>;
     70	phy_type = "utmi";
     71	dr_mode = "host";
     72	status = "okay";
     73};
     74
     75&usbotg {
     76	vbus-supply = <&reg_usb_otg_vbus>;
     77	pinctrl-names = "default";
     78	pinctrl-0 = <&pinctrl_usbotg>;
     79	phy_type = "utmi";
     80	dr_mode = "host";
     81	disable-over-current;
     82	status = "okay";
     83};
     84
     85&usdhc1 {
     86	pinctrl-names = "default";
     87	pinctrl-0 = <&pinctrl_usdhc1>;
     88	cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
     89	status = "okay";
     90};
     91
     92&usdhc3 {
     93	pinctrl-names = "default";
     94	pinctrl-0 = <&pinctrl_usdhc3>;
     95	bus-width = <8>;
     96	non-removable;
     97	status = "okay";
     98};
     99
    100&iomuxc {
    101	pinctrl_can1: can1grp {
    102		fsl,pins = <
    103			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b008
    104			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b008
    105		>;
    106	};
    107
    108	pinctrl_i2c1: i2c1grp {
    109		fsl,pins = <
    110			MX6QDL_PAD_CSI0_DAT8__I2C1_SDA		0x4001f8b1
    111			MX6QDL_PAD_CSI0_DAT9__I2C1_SCL		0x4001f8b1
    112		>;
    113	};
    114
    115	pinctrl_i2c3: i2c3grp {
    116		fsl,pins = <
    117			MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1
    118			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
    119		>;
    120	};
    121
    122	pinctrl_uart4: uart4grp {
    123		fsl,pins = <
    124			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1
    125			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1
    126		>;
    127	};
    128
    129	pinctrl_usdhc1: usdhc1grp {
    130		fsl,pins = <
    131			MX6QDL_PAD_SD1_CMD__SD1_CMD		0x170f9
    132			MX6QDL_PAD_SD1_CLK__SD1_CLK		0x100f9
    133			MX6QDL_PAD_SD1_DAT0__SD1_DATA0		0x170f9
    134			MX6QDL_PAD_SD1_DAT1__SD1_DATA1		0x170f9
    135			MX6QDL_PAD_SD1_DAT2__SD1_DATA2		0x170f9
    136			MX6QDL_PAD_SD1_DAT3__SD1_DATA3		0x170f9
    137			MX6QDL_PAD_GPIO_1__GPIO1_IO01		0x1b0b0
    138		>;
    139	};
    140
    141	pinctrl_usdhc3: usdhc3grp {
    142		fsl,pins = <
    143			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17099
    144			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10099
    145			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17099
    146			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17099
    147			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17099
    148			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17099
    149			MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17099
    150			MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17099
    151			MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17099
    152			MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17099
    153			MX6QDL_PAD_SD3_RST__SD3_RESET		0x1b0b1
    154		>;
    155	};
    156
    157	pinctrl_usbotg: usbotggrp {
    158		fsl,pins = <
    159			MX6QDL_PAD_EIM_D21__USB_OTG_OC	0x1b0b0
    160			MX6QDL_PAD_EIM_D22__GPIO3_IO22	0x1b0b0
    161		>;
    162	};
    163};