cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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imx6ul-imx6ull-opos6uldev.dtsi (7126B)


      1// SPDX-License-Identifier: GPL-2.0 OR MIT
      2//
      3// Copyright 2019 Armadeus Systems <support@armadeus.com>
      4
      5/ {
      6	chosen {
      7		stdout-path = &uart1;
      8	};
      9
     10	backlight: backlight {
     11		compatible = "pwm-backlight";
     12		pwms = <&pwm3 0 191000>;
     13		brightness-levels = <0 4 8 16 32 64 128 255>;
     14		default-brightness-level = <7>;
     15		power-supply = <&reg_5v>;
     16		status = "okay";
     17	};
     18
     19	gpio-keys {
     20		compatible = "gpio-keys";
     21		pinctrl-names = "default";
     22		pinctrl-0 = <&pinctrl_gpio_keys>;
     23
     24		user-button {
     25			label = "User button";
     26			gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
     27			linux,code = <BTN_MISC>;
     28			wakeup-source;
     29		};
     30	};
     31
     32	leds {
     33		compatible = "gpio-leds";
     34
     35		user-led {
     36			label = "User";
     37			pinctrl-names = "default";
     38			pinctrl-0 = <&pinctrl_led>;
     39			gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
     40			linux,default-trigger = "heartbeat";
     41		};
     42	};
     43
     44	onewire {
     45		compatible = "w1-gpio";
     46		pinctrl-names = "default";
     47		pinctrl-0 = <&pinctrl_w1>;
     48		gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
     49	};
     50
     51	panel: panel {
     52		compatible = "armadeus,st0700-adapt";
     53		power-supply = <&reg_3v3>;
     54		backlight = <&backlight>;
     55
     56		port {
     57			panel_in: endpoint {
     58				remote-endpoint = <&lcdif_out>;
     59			};
     60		};
     61	};
     62
     63	reg_5v: regulator-5v {
     64		compatible = "regulator-fixed";
     65		regulator-name = "5V";
     66		regulator-min-microvolt = <5000000>;
     67		regulator-max-microvolt = <5000000>;
     68	};
     69
     70	reg_usbotg1_vbus: regulator-usbotg1vbus {
     71		compatible = "regulator-fixed";
     72		regulator-name = "usbotg1vbus";
     73		regulator-min-microvolt = <5000000>;
     74		regulator-max-microvolt = <5000000>;
     75		pinctrl-names = "default";
     76		pinctrl-0 = <&pinctrl_usbotg1_vbus>;
     77		gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
     78		enable-active-high;
     79	};
     80
     81	reg_usbotg2_vbus: regulator-usbotg2vbus {
     82		compatible = "regulator-fixed";
     83		regulator-name = "usbotg2vbus";
     84		regulator-min-microvolt = <5000000>;
     85		regulator-max-microvolt = <5000000>;
     86		pinctrl-names = "default";
     87		pinctrl-0 = <&pinctrl_usbotg2_vbus>;
     88		gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
     89		enable-active-high;
     90	};
     91};
     92
     93&adc1 {
     94	vref-supply = <&reg_3v3>;
     95	status = "okay";
     96};
     97
     98&can1 {
     99	pinctrl-names = "default";
    100	pinctrl-0 = <&pinctrl_flexcan1>;
    101	xceiver-supply = <&reg_5v>;
    102	status = "okay";
    103};
    104
    105&can2 {
    106	pinctrl-names = "default";
    107	pinctrl-0 = <&pinctrl_flexcan2>;
    108	xceiver-supply = <&reg_5v>;
    109	status = "okay";
    110};
    111
    112&ecspi4 {
    113	pinctrl-names = "default";
    114	pinctrl-0 = <&pinctrl_ecspi4>;
    115	cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>, <&gpio4 3 GPIO_ACTIVE_LOW>;
    116	status = "okay";
    117};
    118
    119&i2c1 {
    120	pinctrl-names = "default";
    121	pinctrl-0 = <&pinctrl_i2c1>;
    122	clock-frequency = <400000>;
    123	status = "okay";
    124};
    125
    126&i2c2 {
    127	pinctrl-names = "default";
    128	pinctrl-0 = <&pinctrl_i2c2>;
    129	clock-frequency = <400000>;
    130	status = "okay";
    131};
    132
    133&lcdif {
    134	pinctrl-names = "default";
    135	pinctrl-0 = <&pinctrl_lcdif>;
    136	status = "okay";
    137
    138	port {
    139		lcdif_out: endpoint {
    140			remote-endpoint = <&panel_in>;
    141		};
    142	};
    143};
    144
    145&pwm3 {
    146	#pwm-cells = <2>;
    147	pinctrl-names = "default";
    148	pinctrl-0 = <&pinctrl_pwm3>;
    149	status = "okay";
    150};
    151
    152&snvs_pwrkey {
    153	status = "disabled";
    154};
    155
    156&tsc {
    157	pinctrl-names = "default";
    158	pinctrl-0 = <&pinctrl_tsc>;
    159	xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
    160	measure-delay-time = <0xffff>;
    161	pre-charge-time = <0xffff>;
    162	status = "okay";
    163};
    164
    165&uart1 {
    166	pinctrl-names = "default";
    167	pinctrl-0 = <&pinctrl_uart1>;
    168	status = "okay";
    169};
    170
    171&uart2 {
    172	pinctrl-names = "default";
    173	pinctrl-0 = <&pinctrl_uart2>;
    174	status = "okay";
    175};
    176
    177&usbotg1 {
    178	pinctrl-names = "default";
    179	pinctrl-0 = <&pinctrl_usbotg1_id>;
    180	vbus-supply = <&reg_usbotg1_vbus>;
    181	dr_mode = "otg";
    182	disable-over-current;
    183	status = "okay";
    184};
    185
    186&usbotg2 {
    187	vbus-supply = <&reg_usbotg2_vbus>;
    188	dr_mode = "host";
    189	disable-over-current;
    190	status = "okay";
    191};
    192
    193&iomuxc {
    194	pinctrl-names = "default";
    195	pinctrl-0 = <&pinctrl_gpios>;
    196
    197	pinctrl_ecspi4: ecspi4grp {
    198		fsl,pins = <
    199			MX6UL_PAD_NAND_DATA04__ECSPI4_SCLK	0x1b0b0
    200			MX6UL_PAD_NAND_DATA05__ECSPI4_MOSI	0x1b0b0
    201			MX6UL_PAD_NAND_DATA06__ECSPI4_MISO	0x1b0b0
    202			MX6UL_PAD_NAND_DATA01__GPIO4_IO03	0x1b0b0
    203			MX6UL_PAD_NAND_DATA07__GPIO4_IO09	0x1b0b0
    204		>;
    205	};
    206
    207	pinctrl_flexcan1: flexcan1grp {
    208		fsl,pins = <
    209			MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX	0x0b0b0
    210			MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX	0x0b0b0
    211		>;
    212	};
    213
    214	pinctrl_flexcan2: flexcan2grp {
    215		fsl,pins = <
    216			MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX	0x0b0b0
    217			MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX	0x0b0b0
    218		>;
    219	};
    220
    221	pinctrl_gpios: gpiosgrp {
    222		fsl,pins = <
    223			MX6UL_PAD_GPIO1_IO09__GPIO1_IO09	0x0b0b0
    224			MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25	0x0b0b0
    225			MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24	0x0b0b0
    226			MX6UL_PAD_NAND_RE_B__GPIO4_IO00		0x0b0b0
    227			MX6UL_PAD_GPIO1_IO08__GPIO1_IO08	0x0b0b0
    228			MX6UL_PAD_UART1_CTS_B__GPIO1_IO18	0x0b0b0
    229			MX6UL_PAD_UART1_RTS_B__GPIO1_IO19	0x0b0b0
    230			MX6UL_PAD_NAND_WE_B__GPIO4_IO01		0x0b0b0
    231		>;
    232	};
    233
    234	pinctrl_gpio_keys: gpiokeysgrp {
    235		fsl,pins = <
    236			MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11	0x0b0b0
    237		>;
    238	};
    239
    240	pinctrl_i2c1: i2c1grp {
    241		fsl,pins = <
    242			MX6UL_PAD_UART4_RX_DATA__I2C1_SDA	0x4001b8b0
    243			MX6UL_PAD_UART4_TX_DATA__I2C1_SCL	0x4001b8b0
    244		>;
    245	};
    246
    247	pinctrl_i2c2: i2c2grp {
    248		fsl,pins = <
    249			MX6UL_PAD_UART5_RX_DATA__I2C2_SDA	0x4001b8b0
    250			MX6UL_PAD_UART5_TX_DATA__I2C2_SCL	0x4001b8b0
    251		>;
    252	};
    253
    254	pinctrl_lcdif: lcdifgrp {
    255		fsl,pins = <
    256			MX6UL_PAD_LCD_CLK__LCDIF_CLK	    0x100b1
    257			MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE  0x100b1
    258			MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC    0x100b1
    259			MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC    0x100b1
    260			MX6UL_PAD_LCD_DATA00__LCDIF_DATA00  0x100b1
    261			MX6UL_PAD_LCD_DATA01__LCDIF_DATA01  0x100b1
    262			MX6UL_PAD_LCD_DATA02__LCDIF_DATA02  0x100b1
    263			MX6UL_PAD_LCD_DATA03__LCDIF_DATA03  0x100b1
    264			MX6UL_PAD_LCD_DATA04__LCDIF_DATA04  0x100b1
    265			MX6UL_PAD_LCD_DATA05__LCDIF_DATA05  0x100b1
    266			MX6UL_PAD_LCD_DATA06__LCDIF_DATA06  0x100b1
    267			MX6UL_PAD_LCD_DATA07__LCDIF_DATA07  0x100b1
    268			MX6UL_PAD_LCD_DATA08__LCDIF_DATA08  0x100b1
    269			MX6UL_PAD_LCD_DATA09__LCDIF_DATA09  0x100b1
    270			MX6UL_PAD_LCD_DATA10__LCDIF_DATA10  0x100b1
    271			MX6UL_PAD_LCD_DATA11__LCDIF_DATA11  0x100b1
    272			MX6UL_PAD_LCD_DATA12__LCDIF_DATA12  0x100b1
    273			MX6UL_PAD_LCD_DATA13__LCDIF_DATA13  0x100b1
    274			MX6UL_PAD_LCD_DATA14__LCDIF_DATA14  0x100b1
    275			MX6UL_PAD_LCD_DATA15__LCDIF_DATA15  0x100b1
    276			MX6UL_PAD_LCD_DATA16__LCDIF_DATA16  0x100b1
    277			MX6UL_PAD_LCD_DATA17__LCDIF_DATA17  0x100b1
    278		>;
    279	};
    280
    281	pinctrl_led: ledgrp {
    282		fsl,pins = <
    283			MX6UL_PAD_LCD_RESET__GPIO3_IO04		0x0b0b0
    284		>;
    285	};
    286
    287	pinctrl_pwm3: pwm3grp {
    288		fsl,pins = <
    289			MX6UL_PAD_NAND_ALE__PWM3_OUT		0x1b0b0
    290		>;
    291	};
    292
    293	pinctrl_tsc: tscgrp {
    294		fsl,pins = <
    295			MX6UL_PAD_GPIO1_IO01__GPIO1_IO01       0xb0
    296			MX6UL_PAD_GPIO1_IO02__GPIO1_IO02       0xb0
    297			MX6UL_PAD_GPIO1_IO03__GPIO1_IO03       0xb0
    298			MX6UL_PAD_GPIO1_IO04__GPIO1_IO04       0xb0
    299		>;
    300	};
    301
    302	pinctrl_uart1: uart1grp {
    303		fsl,pins = <
    304			MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX	0x1b0b1
    305			MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX	0x1b0b1
    306		>;
    307	};
    308
    309	pinctrl_uart2: uart2grp {
    310		fsl,pins = <
    311			MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX	0x1b0b1
    312			MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX	0x1b0b1
    313		>;
    314	};
    315
    316	pinctrl_usbotg1_id: usbotg1idgrp {
    317		fsl,pins = <
    318			MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID	0x1b0b0
    319		>;
    320	};
    321
    322	pinctrl_usbotg1_vbus: usbotg1vbusgrp {
    323		fsl,pins = <
    324			MX6UL_PAD_GPIO1_IO05__GPIO1_IO05	0x1b0b0
    325		>;
    326	};
    327};