cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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imx6ul-phytec-segin-peb-eval-01.dtsi (1090B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Copyright (C) 2016 PHYTEC Messtechnik
      4 * Author: Christian Hemp <c.hemp@phytec.de>
      5 */
      6
      7#include <dt-bindings/input/input.h>
      8
      9/ {
     10	gpio_keys: gpio-keys {
     11		compatible = "gpio-key";
     12		pinctrl-names = "default";
     13		pinctrl-0 = <&pinctrl_gpio_keys>;
     14		status = "disabled";
     15
     16		power {
     17			label = "Power Button";
     18			gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
     19			linux,code = <KEY_POWER>;
     20			wakeup-source;
     21		};
     22	};
     23
     24	user_leds: user-leds {
     25		compatible = "gpio-leds";
     26		pinctrl-names = "default";
     27		pinctrl-0 = <&pinctrl_user_leds>;
     28		status = "disabled";
     29
     30		user-led1 {
     31			gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
     32			linux,default-trigger = "gpio";
     33			default-state = "on";
     34		};
     35
     36		user-led2 {
     37			gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
     38			linux,default-trigger = "gpio";
     39			default-state = "on";
     40		};
     41	};
     42};
     43
     44&iomuxc {
     45	pinctrl_gpio_keys: gpio_keysgrp {
     46		fsl,pins = <
     47			MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00	0x79
     48		>;
     49	};
     50
     51	pinctrl_user_leds: user_ledsgrp {
     52		fsl,pins = <
     53			MX6UL_PAD_JTAG_MOD__GPIO1_IO10		0x79
     54			MX6UL_PAD_GPIO1_IO01__GPIO1_IO01	0x79
     55		>;
     56	};
     57};