cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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imx6ul-phytec-segin-peb-wlbt-05.dtsi (2149B)

      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Copyright (C) 2021 PHYTEC Messtechnik GmbH
      4 * Author: Yunus Bas <y.bas@phytec.de>
      5 */
      6
      7#include <dt-bindings/gpio/gpio.h>
      8#include <dt-bindings/interrupt-controller/irq.h>
      9
     10/ {
     11	reg_wl_en: regulator-wl-en {
     12		compatible = "regulator-fixed";
     13		regulator-name = "wlan_en";
     14		regulator-min-microvolt = <3300000>;
     15		regulator-max-microvolt = <3300000>;
     16		pinctrl-names = "default";
     17		pinctrl-0 = <&pinctrl_wl>;
     18		gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
     19		enable-active-high;
     20		startup-delay-us = <100>;
     21		status = "disabled";
     22	};
     23};
     24
     25&iomuxc {
     26	pinctrl_bt: btgrp {
     27		fsl,pins = <
     28			MX6UL_PAD_GPIO1_IO01__GPIO1_IO01	0x3031	/* BT ENABLE */
     29			MX6UL_PAD_GPIO1_IO03__GPIO1_IO03	0x3031	/* HOST WAKEUP */
     30			MX6UL_PAD_JTAG_MOD__GPIO1_IO10		0x3031	/* DEV WAKEUP */
     31		>;
     32	};
     33
     34	pinctrl_uart2_bt: uart2grp-bt {
     35		fsl,pins = <
     36			MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX   0x17059
     37			MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX   0x17059
     38			MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS    0x17059
     39			MX6UL_PAD_UART2_RTS_B__UART2_DCE_RTS    0x17059
     40		>;
     41	};
     42
     43	pinctrl_usdhc2_wl: usdhc2grp-wl {
     44		fsl,pins = <
     45			MX6UL_PAD_LCD_DATA18__USDHC2_CMD    0x10051
     46			MX6UL_PAD_LCD_DATA19__USDHC2_CLK    0x10061
     47			MX6UL_PAD_LCD_DATA20__USDHC2_DATA0  0x10051
     48			MX6UL_PAD_LCD_DATA21__USDHC2_DATA1  0x10051
     49			MX6UL_PAD_LCD_DATA22__USDHC2_DATA2  0x10051
     50			MX6UL_PAD_LCD_DATA23__USDHC2_DATA3  0x10051
     51		>;
     52	};
     53
     54	pinctrl_wl: wlgrp {
     55		fsl,pins = <
     56			MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09  0x3031	/* WLAN ENABLE */
     57		>;
     58	};
     59};
     60
     61&uart2 {
     62	pinctrl-names = "default";
     63	pinctrl-0 = <&pinctrl_uart2_bt &pinctrl_bt>;
     64	uart-has-rtscts;
     65	status = "disabled";
     66
     67	bluetooth {
     68		compatible = "brcm,bcm43438-bt";
     69		shutdown-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
     70		device-wakeup-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
     71		host-wakeup-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
     72	};
     73};
     74
     75&usdhc2 {
     76	#address-cells = <1>;
     77	#size-cells = <0>;
     78	pinctrl-names = "default";
     79	pinctrl-0 = <&pinctrl_usdhc2_wl>;
     80	vmmc-supply = <&reg_wl_en>;
     81	bus-width = <4>;
     82	non-removable;
     83	no-1-8-v;
     84	status = "disabled";
     85
     86	brmcf: wifi@1 {
     87		compatible = "brcm,bcm4329-fmac";
     88		reg = <1>;
     89	};
     90};