cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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imx6ul-pico-pi.dts (2083B)

      1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
      2//
      3// Copyright 2015 Technexion Ltd.
      4//
      5// Author: Wig Cheng  <wig.cheng@technexion.com>
      6//	   Richard Hu <richard.hu@technexion.com>
      7//	   Tapani Utriainen <tapani@technexion.com>
      8/dts-v1/;
      9
     10#include "imx6ul-pico.dtsi"
     11/ {
     12	model = "TechNexion PICO-IMX6UL and PI baseboard";
     13	compatible = "technexion,imx6ul-pico-pi", "fsl,imx6ul";
     14
     15	leds {
     16		compatible = "gpio-leds";
     17		pinctrl-names = "default";
     18		pinctrl-0 = <&pinctrl_gpio_leds>;
     19
     20		led {
     21			label = "gpio-led";
     22			gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>;
     23		};
     24	};
     25
     26	sound {
     27		compatible = "fsl,imx-audio-sgtl5000";
     28		model = "imx6ul-sgtl5000";
     29		audio-cpu = <&sai1>;
     30		audio-codec = <&sgtl5000>;
     31		audio-routing =
     32			"LINE_IN", "Line In Jack",
     33			"MIC_IN", "Mic Jack",
     34			"Mic Jack", "Mic Bias",
     35			"Headphone Jack", "HP_OUT";
     36	};
     37
     38	sys_mclk: clock-sys-mclk {
     39		compatible = "fixed-clock";
     40		#clock-cells = <0>;
     41		clock-frequency = <24576000>;
     42	};
     43};
     44
     45&i2c2 {
     46	clock-frequency = <100000>;
     47	pinctrl-names = "default";
     48	pinctrl-0 = <&pinctrl_i2c2>;
     49	status = "okay";
     50
     51	sgtl5000: codec@a {
     52		reg = <0x0a>;
     53		compatible = "fsl,sgtl5000";
     54		clocks = <&sys_mclk>;
     55		VDDA-supply = <&reg_2p5v>;
     56		VDDIO-supply = <&reg_3p3v>;
     57	};
     58};
     59
     60&i2c3 {
     61	clock-frequency = <100000>;
     62	pinctrl-names = "default";
     63	pinctrl-0 = <&pinctrl_i2c3>;
     64	status = "okay";
     65
     66	polytouch: touchscreen@38 {
     67		compatible = "edt,edt-ft5x06";
     68		reg = <0x38>;
     69		interrupt-parent = <&gpio1>;
     70		interrupts = <29 IRQ_TYPE_EDGE_FALLING>;
     71		reset-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
     72		touchscreen-size-x = <800>;
     73		touchscreen-size-y = <480>;
     74	};
     75};
     76
     77&iomuxc {
     78	pinctrl-names = "default";
     79	pinctrl-0 = <&pinctrl_hog>;
     80
     81	pinctrl_hog: hoggrp {
     82		fsl,pins = <
     83			MX6UL_PAD_CSI_VSYNC__GPIO4_IO19		0x10b0
     84			MX6UL_PAD_CSI_DATA00__GPIO4_IO21	0x10b0
     85			MX6UL_PAD_CSI_DATA01__GPIO4_IO22	0x10b0
     86			MX6UL_PAD_CSI_DATA02__GPIO4_IO23	0x10b0
     87			MX6UL_PAD_UART1_CTS_B__GPIO1_IO18	0x10b0
     88			MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02	0x10b0
     89		>;
     90	};
     91
     92	pinctrl_gpio_leds: gpioledsgrp {
     93		fsl,pins = <
     94			MX6UL_PAD_CSI_HSYNC__GPIO4_IO20		0x10b0
     95		>;
     96	};
     97};