cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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imx6ul-tqma6ulxl-common.dtsi (919B)

      1// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
      2/*
      3 * Copyright 2018-2022 TQ-Systems GmbH
      4 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
      5 */
      6
      7/*
      8 * Common for
      9 * - TQMa6ULxL
     10 * - TQMa6ULLxL
     11 */
     12
     13/ {
     14	reg_vin: reg-vin {
     15		compatible = "regulator-fixed";
     16		regulator-name = "VIN";
     17		regulator-min-microvolt = <3300000>;
     18		regulator-max-microvolt = <3300000>;
     19		regulator-always-on;
     20	};
     21};
     22
     23&m24c64_50 {
     24	vcc-supply = <&reg_vin>;
     25};
     26
     27&m24c02_52 {
     28	vcc-supply = <&reg_vin>;
     29};
     30
     31/* eMMC */
     32&usdhc2 {
     33	vmmc-supply = <&reg_vin>;
     34	vqmmc-supply = <&reg_vldo4>;
     35};
     36
     37&iomuxc {
     38	pinctrl_qspi: qspigrp {
     39		fsl,pins = <
     40			MX6UL_PAD_NAND_WP_B__QSPI_A_SCLK      0x70a9
     41			MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00 0x70a9
     42			MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01   0x70a9
     43			MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02   0x70a9
     44			MX6UL_PAD_NAND_CLE__QSPI_A_DATA03     0x70a9
     45			MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B      0x70a1
     46		>;
     47	};
     48};