cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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imx6ull-colibri-eval-v3.dtsi (1961B)

      1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
      2/*
      3 * Copyright 2017-2022 Toradex
      4 */
      5
      6/ {
      7	chosen {
      8		stdout-path = "serial0:115200n8";
      9	};
     10
     11	/* fixed crystal dedicated to mcp2515 */
     12	clk16m: clk16m {
     13		compatible = "fixed-clock";
     14		#clock-cells = <0>;
     15		clock-frequency = <16000000>;
     16	};
     17
     18	reg_3v3: regulator-3v3 {
     19		compatible = "regulator-fixed";
     20		regulator-name = "3.3V";
     21		regulator-min-microvolt = <3300000>;
     22		regulator-max-microvolt = <3300000>;
     23	};
     24
     25	reg_5v0: regulator-5v0 {
     26		compatible = "regulator-fixed";
     27		regulator-name = "5V";
     28		regulator-min-microvolt = <5000000>;
     29		regulator-max-microvolt = <5000000>;
     30	};
     31
     32	reg_usbh_vbus: regulator-usbh-vbus {
     33		compatible = "regulator-fixed";
     34		pinctrl-names = "default";
     35		pinctrl-0 = <&pinctrl_usbh_reg>;
     36		regulator-name = "VCC_USB[1-4]";
     37		regulator-min-microvolt = <5000000>;
     38		regulator-max-microvolt = <5000000>;
     39		gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
     40		vin-supply = <&reg_5v0>;
     41	};
     42};
     43
     44&adc1 {
     45	status = "okay";
     46};
     47
     48&ecspi1 {
     49	status = "okay";
     50
     51	mcp2515: can@0 {
     52		compatible = "microchip,mcp2515";
     53		pinctrl-names = "default";
     54		pinctrl-0 = <&pinctrl_can_int>;
     55		reg = <0>;
     56		clocks = <&clk16m>;
     57		interrupt-parent = <&gpio2>;
     58		interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
     59		spi-max-frequency = <10000000>;
     60		vdd-supply = <&reg_3v3>;
     61		xceiver-supply = <&reg_5v0>;
     62		status = "okay";
     63	};
     64};
     65
     66&i2c1 {
     67	status = "okay";
     68
     69	/* M41T0M6 real time clock on carrier board */
     70	m41t0m6: rtc@68 {
     71		compatible = "st,m41t0";
     72		reg = <0x68>;
     73	};
     74};
     75
     76/* PWM <A> */
     77&pwm4 {
     78	status = "okay";
     79};
     80
     81/* PWM <B> */
     82&pwm5 {
     83	status = "okay";
     84};
     85
     86/* PWM <C> */
     87&pwm6 {
     88	status = "okay";
     89};
     90
     91/* PWM <D> */
     92&pwm7 {
     93	status = "okay";
     94};
     95
     96&uart1 {
     97	status = "okay";
     98};
     99
    100&uart2 {
    101	status = "okay";
    102};
    103
    104&uart5 {
    105	status = "okay";
    106};
    107
    108&usbotg1 {
    109	vbus-supply = <&reg_usbh_vbus>;
    110	status = "okay";
    111};
    112
    113&usbotg2 {
    114	vbus-supply = <&reg_usbh_vbus>;
    115	status = "okay";
    116};
    117
    118&usdhc1 {
    119	vmmc-supply = <&reg_3v3>;
    120	status = "okay";
    121};