intel-ixp42x-freecom-fsg-3.dts (5387B)
1// SPDX-License-Identifier: ISC 2/* 3 * Device Tree file for the Freecom FSG-3 router. 4 * This machine is based on IXP425. 5 * This device tree is inspired by the board file by Rod Whitby. 6 */ 7 8/dts-v1/; 9 10#include "intel-ixp42x.dtsi" 11#include <dt-bindings/input/input.h> 12 13/ { 14 model = "Freecom FSG-3"; 15 compatible = "freecom,fsg-3", "intel,ixp42x"; 16 #address-cells = <1>; 17 #size-cells = <1>; 18 19 memory@0 { 20 /* 64 MB memory */ 21 device_type = "memory"; 22 reg = <0x00000000 0x4000000>; 23 }; 24 25 chosen { 26 /* Boot from the first partition on the hard drive */ 27 bootargs = "console=ttyS0,115200n8 root=/dev/sda1 rw rootfstype=ext4 rootwait"; 28 stdout-path = "uart0:115200n8"; 29 }; 30 31 aliases { 32 serial0 = &uart0; 33 }; 34 35 gpio_keys { 36 compatible = "gpio-keys"; 37 38 button-sync { 39 wakeup-source; 40 /* Closest approximation of what the key should do */ 41 linux,code = <KEY_CONNECT>; 42 label = "sync"; 43 gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>; 44 }; 45 button-reset { 46 wakeup-source; 47 linux,code = <KEY_ESC>; 48 label = "reset"; 49 gpios = <&gpio0 9 GPIO_ACTIVE_LOW>; 50 }; 51 button-usb { 52 wakeup-source; 53 /* Unplug USB, closest approximation of what the key should do */ 54 linux,code = <KEY_EJECTCD>; 55 label = "usb"; 56 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; 57 }; 58 }; 59 60 i2c { 61 compatible = "i2c-gpio"; 62 sda-gpios = <&gpio0 12 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; 63 scl-gpios = <&gpio0 13 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; 64 #address-cells = <1>; 65 #size-cells = <0>; 66 67 hwmon@28 { 68 /* 69 * Temperature sensor and fan control chip. 70 * 71 * TODO: create a proper device tree binding for 72 * the sensor and temperature zone and create a 73 * zone with fan control. 74 */ 75 compatible = "winbond,w83781d"; 76 reg = <0x28>; 77 }; 78 rtc@6f { 79 compatible = "isil,isl1208"; 80 reg = <0x6f>; 81 }; 82 }; 83 84 soc { 85 bus@c4000000 { 86 flash@0,0 { 87 compatible = "intel,ixp4xx-flash", "cfi-flash"; 88 bank-width = <2>; 89 /* Enable writes on the expansion bus */ 90 intel,ixp4xx-eb-write-enable = <1>; 91 /* 4 MB of Flash mapped in at CS0 */ 92 reg = <0 0x00000000 0x400000>; 93 94 partitions { 95 compatible = "redboot-fis"; 96 /* Eraseblock at 0x3e0000 */ 97 fis-index-block = <0x1f>; 98 }; 99 }; 100 101 /* Small syscon with some LEDs at CS2 */ 102 syscon@2,0 { 103 compatible = "freecom,fsg-cs2-system-controller", "syscon"; 104 reg = <2 0x0 0x200>; 105 reg-io-width = <2>; 106 #address-cells = <1>; 107 #size-cells = <1>; 108 ranges = <2 0x0 0x0 0x200>; 109 110 led@0,0 { 111 compatible = "register-bit-led"; 112 reg = <0x00 0x02>; 113 mask = <0x01>; 114 label = "fsg:blue:wlan"; 115 linux,default-trigger = "wlan"; 116 default-state = "on"; 117 }; 118 led@0,1 { 119 compatible = "register-bit-led"; 120 reg = <0x00 0x02>; 121 mask = <0x02>; 122 label = "fsg:blue:wan"; 123 linux,default-trigger = ""; 124 default-state = "on"; 125 }; 126 led@0,2 { 127 compatible = "register-bit-led"; 128 reg = <0x00 0x02>; 129 mask = <0x04>; 130 label = "fsg:blue:sata"; 131 linux,default-trigger = ""; 132 default-state = "on"; 133 }; 134 led@0,3 { 135 compatible = "register-bit-led"; 136 reg = <0x00 0x02>; 137 mask = <0x04>; 138 label = "fsg:blue:usb"; 139 linux,default-trigger = ""; 140 default-state = "on"; 141 }; 142 led@0,4 { 143 compatible = "register-bit-led"; 144 reg = <0x00 0x02>; 145 mask = <0x08>; 146 label = "fsg:blue:sync"; 147 linux,default-trigger = ""; 148 default-state = "on"; 149 }; 150 led@0,5 { 151 compatible = "register-bit-led"; 152 reg = <0x00 0x02>; 153 mask = <0x10>; 154 label = "fsg:blue:ring"; 155 linux,default-trigger = ""; 156 default-state = "on"; 157 }; 158 }; 159 }; 160 161 pci@c0000000 { 162 status = "ok"; 163 164 /* 165 * Written based on the FSG-3 PCI boardfile. 166 * We have slots 12, 13 & 14 (IDSEL) with one IRQ each. 167 */ 168 #interrupt-cells = <1>; 169 interrupt-map-mask = <0xf800 0 0 7>; 170 interrupt-map = 171 /* IDSEL 12 */ 172 <0x6000 0 0 1 &gpio0 5 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 12 is irq 5 */ 173 <0x6000 0 0 2 &gpio0 5 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 12 is irq 5 */ 174 <0x6000 0 0 3 &gpio0 5 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 12 is irq 5 */ 175 <0x6000 0 0 4 &gpio0 5 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 12 is irq 5 */ 176 /* IDSEL 13 */ 177 <0x6800 0 0 1 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 13 is irq 7 */ 178 <0x6800 0 0 2 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 13 is irq 7 */ 179 <0x6800 0 0 3 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 13 is irq 7 */ 180 <0x6800 0 0 4 &gpio0 7 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 13 is irq 7 */ 181 /* IDSEL 14 */ 182 <0x7000 0 0 1 &gpio0 6 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 14 is irq 6 */ 183 <0x7000 0 0 2 &gpio0 6 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 14 is irq 6 */ 184 <0x7000 0 0 3 &gpio0 6 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 14 is irq 6 */ 185 <0x7000 0 0 4 &gpio0 6 IRQ_TYPE_LEVEL_LOW>; /* INT D on slot 14 is irq 6 */ 186 }; 187 188 /* EthB */ 189 ethernet@c8009000 { 190 status = "ok"; 191 queue-rx = <&qmgr 3>; 192 queue-txready = <&qmgr 20>; 193 phy-mode = "rgmii"; 194 phy-handle = <&phy5>; 195 196 mdio { 197 #address-cells = <1>; 198 #size-cells = <0>; 199 200 phy4: ethernet-phy@4 { 201 reg = <4>; 202 }; 203 204 phy5: ethernet-phy@5 { 205 reg = <5>; 206 }; 207 }; 208 }; 209 210 /* EthC */ 211 ethernet@c800a000 { 212 status = "ok"; 213 queue-rx = <&qmgr 4>; 214 queue-txready = <&qmgr 21>; 215 phy-mode = "rgmii"; 216 phy-handle = <&phy4>; 217 }; 218 }; 219};