cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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keystone-k2l-evm.dts (2900B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Keystone 2 Lamarr EVM device tree
      4 *
      5 * Copyright (C) 2014-2017 Texas Instruments Incorporated - http://www.ti.com/
      6 */
      7/dts-v1/;
      8
      9#include "keystone.dtsi"
     10#include "keystone-k2l.dtsi"
     11
     12/ {
     13	compatible = "ti,k2l-evm", "ti,k2l", "ti,keystone";
     14	model = "Texas Instruments Keystone 2 Lamarr EVM";
     15
     16	reserved-memory {
     17		#address-cells = <2>;
     18		#size-cells = <2>;
     19		ranges;
     20
     21		dsp_common_memory: dsp-common-memory@81f800000 {
     22			compatible = "shared-dma-pool";
     23			reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
     24			reusable;
     25			status = "okay";
     26		};
     27	};
     28};
     29
     30&soc0 {
     31		clocks {
     32			refclksys: refclksys {
     33				#clock-cells = <0>;
     34				compatible = "fixed-clock";
     35				clock-frequency = <122880000>;
     36				clock-output-names = "refclk-sys";
     37			};
     38		};
     39};
     40
     41&usb_phy {
     42	status = "okay";
     43};
     44
     45&keystone_usb0 {
     46	status = "okay";
     47};
     48
     49&usb0 {
     50	dr_mode = "host";
     51};
     52
     53&i2c0 {
     54	dtt@50 {
     55		compatible = "atmel,24c1024";
     56		reg = <0x50>;
     57	};
     58};
     59
     60&aemif {
     61	cs0 {
     62		#address-cells = <2>;
     63		#size-cells = <1>;
     64		clock-ranges;
     65		ranges;
     66
     67		ti,cs-chipselect = <0>;
     68		/* all timings in nanoseconds */
     69		ti,cs-min-turnaround-ns = <12>;
     70		ti,cs-read-hold-ns = <6>;
     71		ti,cs-read-strobe-ns = <23>;
     72		ti,cs-read-setup-ns = <9>;
     73		ti,cs-write-hold-ns = <8>;
     74		ti,cs-write-strobe-ns = <23>;
     75		ti,cs-write-setup-ns = <8>;
     76
     77		nand@0,0 {
     78			compatible = "ti,keystone-nand","ti,davinci-nand";
     79			#address-cells = <1>;
     80			#size-cells = <1>;
     81			reg = <0 0 0x4000000
     82			       1 0 0x0000100>;
     83
     84			ti,davinci-chipselect = <0>;
     85			ti,davinci-mask-ale = <0x2000>;
     86			ti,davinci-mask-cle = <0x4000>;
     87			ti,davinci-mask-chipsel = <0>;
     88			nand-ecc-mode = "hw";
     89			ti,davinci-ecc-bits = <4>;
     90			nand-on-flash-bbt;
     91
     92			partition@0 {
     93				label = "u-boot";
     94				reg = <0x0 0x100000>;
     95				read-only;
     96			};
     97
     98			partition@100000 {
     99				label = "params";
    100				reg = <0x100000 0x80000>;
    101				read-only;
    102			};
    103
    104			partition@180000 {
    105				label = "ubifs";
    106				reg = <0x180000 0x7FE80000>;
    107			};
    108		};
    109	};
    110};
    111
    112&spi0 {
    113	nor_flash: flash@0 {
    114		#address-cells = <1>;
    115		#size-cells = <1>;
    116		compatible = "micron,n25q128a11", "jedec,spi-nor";
    117		spi-max-frequency = <54000000>;
    118		m25p,fast-read;
    119		reg = <0>;
    120
    121		partition@0 {
    122			label = "u-boot-spl";
    123			reg = <0x0 0x80000>;
    124			read-only;
    125		};
    126
    127		partition@1 {
    128			label = "misc";
    129			reg = <0x80000 0xf80000>;
    130		};
    131	};
    132};
    133
    134&mdio {
    135	status = "ok";
    136	ethphy0: ethernet-phy@0 {
    137		compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
    138		reg = <0>;
    139	};
    140
    141	ethphy1: ethernet-phy@1 {
    142		compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
    143		reg = <1>;
    144	};
    145};
    146
    147&dsp0 {
    148	memory-region = <&dsp_common_memory>;
    149	status = "okay";
    150};
    151
    152&dsp1 {
    153	memory-region = <&dsp_common_memory>;
    154	status = "okay";
    155};
    156
    157&dsp2 {
    158	memory-region = <&dsp_common_memory>;
    159	status = "okay";
    160};
    161
    162&dsp3 {
    163	memory-region = <&dsp_common_memory>;
    164	status = "okay";
    165};