cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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kirkwood-blackarmor-nas220.dts (3077B)

      1// SPDX-License-Identifier: GPL-2.0+
      2/*
      3 * Device Tree file for Seagate Blackarmor NAS220
      4 *
      5 * Copyright (C) 2014 Evgeni Dobrev <evgeni@studio-punkt.com>
      6 */
      7
      8/dts-v1/;
      9
     10#include <dt-bindings/gpio/gpio.h>
     11#include <dt-bindings/input/input.h>
     12#include "kirkwood.dtsi"
     13#include "kirkwood-6192.dtsi"
     14
     15/ {
     16	model = "Seagate Blackarmor NAS220";
     17	compatible = "seagate,blackarmor-nas220","marvell,kirkwood-88f6192",
     18		     "marvell,kirkwood";
     19
     20	memory { /* 128 MB */
     21		device_type = "memory";
     22		reg = <0x00000000 0x8000000>;
     23	};
     24
     25	chosen {
     26		bootargs = "console=ttyS0,115200n8";
     27		stdout-path = &uart0;
     28	};
     29
     30	gpio_poweroff {
     31		compatible = "gpio-poweroff";
     32		gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
     33	};
     34
     35	gpio_keys {
     36		compatible = "gpio-keys";
     37
     38		reset {
     39			label = "Reset";
     40			linux,code = <KEY_POWER>;
     41			gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
     42		};
     43
     44		button {
     45			label = "Power";
     46			linux,code = <KEY_SLEEP>;
     47			gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
     48		};
     49	};
     50
     51	gpio-leds {
     52		compatible = "gpio-leds";
     53
     54		blue-power {
     55			label = "nas220:blue:power";
     56			gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
     57			linux,default-trigger = "default-on";
     58		};
     59	};
     60
     61	regulators {
     62		compatible = "simple-bus";
     63		#address-cells = <1>;
     64		#size-cells = <0>;
     65		pinctrl-0 = <&pmx_power_sata0 &pmx_power_sata1>;
     66		pinctrl-names = "default";
     67
     68		sata0_power: regulator@1 {
     69			compatible = "regulator-fixed";
     70			reg = <1>;
     71			regulator-name = "SATA0 Power";
     72			regulator-min-microvolt = <5000000>;
     73			regulator-max-microvolt = <5000000>;
     74			enable-active-high;
     75			regulator-always-on;
     76			regulator-boot-on;
     77			gpio = <&gpio0 24 GPIO_ACTIVE_LOW>;
     78		};
     79
     80		sata1_power: regulator@2 {
     81			compatible = "regulator-fixed";
     82			reg = <2>;
     83			regulator-name = "SATA1 Power";
     84			regulator-min-microvolt = <5000000>;
     85			regulator-max-microvolt = <5000000>;
     86			enable-active-high;
     87			regulator-always-on;
     88			regulator-boot-on;
     89			gpio = <&gpio0 28 GPIO_ACTIVE_LOW>;
     90		};
     91	};
     92};
     93
     94/*
     95 * Serial port routed to connector CN5
     96 *
     97 * pin 1 - TX (CPU's TX)
     98 * pin 4 - RX (CPU's RX)
     99 * pin 6 - GND
    100 */
    101&uart0 {
    102	status = "okay";
    103};
    104
    105&pinctrl {
    106	pinctrl-0 = <&pmx_button_reset &pmx_button_power>;
    107	pinctrl-names = "default";
    108
    109	pmx_act_sata0: pmx-act-sata0 {
    110		marvell,pins = "mpp15";
    111		marvell,function = "sata0";
    112	};
    113
    114	pmx_act_sata1: pmx-act-sata1 {
    115		marvell,pins = "mpp16";
    116		marvell,function = "sata1";
    117	};
    118
    119	pmx_power_sata0: pmx-power-sata0 {
    120		marvell,pins = "mpp24";
    121		marvell,function = "gpio";
    122	};
    123
    124	pmx_power_sata1: pmx-power-sata1 {
    125		marvell,pins = "mpp28";
    126		marvell,function = "gpio";
    127	};
    128
    129	pmx_button_reset: pmx-button-reset {
    130		marvell,pins = "mpp29";
    131		marvell,function = "gpio";
    132	};
    133
    134	pmx_button_power: pmx-button-power {
    135		marvell,pins = "mpp26";
    136		marvell,function = "gpio";
    137	};
    138};
    139
    140&sata {
    141	status = "okay";
    142	nr-ports = <2>;
    143};
    144
    145&i2c0 {
    146	status = "okay";
    147
    148	adt7476: thermal@2e {
    149		compatible = "adi,adt7476";
    150		reg = <0x2e>;
    151	};
    152};
    153
    154&nand {
    155	status = "okay";
    156};
    157
    158&mdio {
    159	status = "okay";
    160
    161	ethphy0: ethernet-phy@8 {
    162		 reg = <8>;
    163	};
    164};
    165
    166&eth0 {
    167	status = "okay";
    168
    169	ethernet0-port@0 {
    170		phy-handle = <&ethphy0>;
    171	};
    172};