cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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kirkwood-db.dtsi (1463B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Marvell DB-{88F6281,88F6282}-BP Development Board Setup
      4 *
      5 * Saeed Bishara <saeed@marvell.com>
      6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
      7 *
      8 * This file contains the definitions that are common between the 6281
      9 * and 6282 variants of the Marvell Kirkwood Development Board.
     10 */
     11
     12#include "kirkwood.dtsi"
     13
     14/ {
     15	memory {
     16		device_type = "memory";
     17		reg = <0x00000000 0x20000000>; /* 512 MB */
     18	};
     19
     20	chosen {
     21		bootargs = "console=ttyS0,115200n8 earlyprintk";
     22		stdout-path = &uart0;
     23	};
     24
     25	ocp@f1000000 {
     26		pin-controller@10000 {
     27			pmx_sdio_gpios: pmx-sdio-gpios {
     28				marvell,pins = "mpp37", "mpp38";
     29				marvell,function = "gpio";
     30			};
     31		};
     32
     33		serial@12000 {
     34			status = "okay";
     35		};
     36
     37		sata@80000 {
     38			nr-ports = <2>;
     39			status = "okay";
     40		};
     41
     42		ehci@50000 {
     43			status = "okay";
     44		};
     45
     46		mvsdio@90000 {
     47			pinctrl-0 = <&pmx_sdio_gpios>;
     48			pinctrl-names = "default";
     49			wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
     50			cd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
     51			status = "okay";
     52		};
     53	};
     54};
     55
     56&nand {
     57	chip-delay = <25>;
     58	status = "okay";
     59
     60	partition@0 {
     61		label = "uboot";
     62		reg = <0x0 0x100000>;
     63	};
     64
     65	partition@100000 {
     66		label = "uImage";
     67		reg = <0x100000 0x400000>;
     68	};
     69
     70	partition@500000 {
     71		label = "root";
     72		reg = <0x500000 0x1fb00000>;
     73	};
     74};
     75
     76&mdio {
     77	status = "okay";
     78
     79	ethphy0: ethernet-phy@8 {
     80		reg = <8>;
     81	};
     82};
     83
     84&eth0 {
     85	status = "okay";
     86	ethernet0-port@0 {
     87		phy-handle = <&ethphy0>;
     88	};
     89};