cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

kirkwood-openblocks_a7.dts (3619B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Device Tree file for OpenBlocks A7 board
      4 *
      5 * Copyright (C) 2013 Free Electrons
      6 *
      7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
      8 *
      9 */
     10
     11/dts-v1/;
     12
     13#include "kirkwood.dtsi"
     14#include "kirkwood-6282.dtsi"
     15
     16/ {
     17	model = "Plat'Home OpenBlocksA7";
     18	compatible = "plathome,openblocks-a7", "marvell,kirkwood-88f6283", "marvell,kirkwood";
     19
     20	memory {
     21		device_type = "memory";
     22		reg = <0x00000000 0x40000000>; /* 1 GB */
     23	};
     24
     25	chosen {
     26		bootargs = "console=ttyS0,115200n8 earlyprintk";
     27		stdout-path = &uart0;
     28	};
     29
     30	ocp@f1000000 {
     31		serial@12000 {
     32			status = "okay";
     33		};
     34
     35		serial@12100 {
     36			status = "okay";
     37		};
     38
     39		sata@80000 {
     40			nr-ports = <1>;
     41			status = "okay";
     42		};
     43
     44		i2c@11100 {
     45			status = "okay";
     46
     47			s24c02: s24c02@50 {
     48				compatible = "atmel,24c02";
     49				reg = <0x50>;
     50			};
     51		};
     52
     53		pinctrl: pin-controller@10000 {
     54			pinctrl-0 = <&pmx_dip_switches &pmx_gpio_header
     55				     &pmx_gpio_header_gpo>;
     56			pinctrl-names = "default";
     57
     58			pmx_uart0: pmx-uart0 {
     59				marvell,pins = "mpp10", "mpp11", "mpp15",
     60					"mpp16";
     61				marvell,function = "uart0";
     62			};
     63
     64			pmx_uart1: pmx-uart1 {
     65				marvell,pins = "mpp13", "mpp14", "mpp8",
     66					"mpp9";
     67				marvell,function = "uart1";
     68			};
     69
     70			pmx_sysrst: pmx-sysrst {
     71				marvell,pins = "mpp6";
     72				marvell,function = "sysrst";
     73			};
     74
     75			pmx_dip_switches: pmx-dip-switches {
     76				marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47";
     77				marvell,function = "gpio";
     78			};
     79
     80			/*
     81			 * Accessible on connector J202. The MPP
     82			 * listed below are pin 1-7, pin 8 is unused,
     83			 * pin 9 is external reset input and pin 10 is
     84			 * ground.
     85			 */
     86			pmx_gpio_header: pmx-gpio-header {
     87				marvell,pins = "mpp17", "mpp29", "mpp28",
     88					       "mpp35", "mpp34", "mpp40";
     89				marvell,function = "gpio";
     90			};
     91
     92			pmx_gpio_header_gpo: pxm-gpio-header-gpo {
     93				marvell,pins = "mpp7";
     94				marvell,function = "gpo";
     95			};
     96
     97			pmx_gpio_init: pmx-init {
     98				marvell,pins = "mpp38";
     99				marvell,function = "gpio";
    100			};
    101
    102			pmx_usb_oc: pmx-usb-oc {
    103				marvell,pins = "mpp39";
    104				marvell,function = "gpio";
    105			};
    106
    107			pmx_leds: pmx-leds {
    108				marvell,pins = "mpp41", "mpp42", "mpp43";
    109				marvell,function = "gpio";
    110			};
    111		};
    112	};
    113
    114	gpio-leds {
    115		compatible = "gpio-leds";
    116		pinctrl-0 = <&pmx_leds>;
    117		pinctrl-names = "default";
    118
    119		led-red {
    120			label = "obsa7:red:stat";
    121			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
    122		};
    123
    124		led-green {
    125			label = "obsa7:green:stat";
    126			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
    127		};
    128
    129		led-yellow {
    130			label = "obsa7:yellow:stat";
    131			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
    132		};
    133        };
    134
    135	gpio_keys {
    136		compatible = "gpio-keys";
    137		pinctrl-0 = <&pmx_gpio_init>;
    138		pinctrl-names = "default";
    139		#address-cells = <1>;
    140		#size-cells = <0>;
    141
    142		button {
    143			label = "Init Button";
    144			linux,code = <KEY_POWER>;
    145			gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
    146		};
    147	};
    148};
    149
    150&nand {
    151	chip-delay = <25>;
    152	status = "okay";
    153
    154	partition@0 {
    155		label = "uboot";
    156		reg = <0x0 0x1c0000>;
    157	};
    158
    159	partition@1c0000 {
    160		label = "env";
    161		reg = <0x1c0000 0x2c0000>;
    162	};
    163
    164	partition@480000 {
    165		label = "test";
    166		reg = <0x480000 0x160000>;
    167	};
    168
    169	partition@5e0000 {
    170		label = "conf";
    171		reg = <0x5e0000 0x540000>;
    172	};
    173
    174	partition@b20000 {
    175		label = "linux";
    176		reg = <0xb20000 0x3d40000>;
    177	};
    178
    179	partition@4860000 {
    180		label = "user";
    181		reg = <0x4860000 0xb7a0000>;
    182	};
    183};
    184
    185&mdio {
    186	status = "okay";
    187
    188	ethphy0: ethernet-phy@0 {
    189		reg = <0>;
    190	};
    191
    192	ethphy1: ethernet-phy@1 {
    193		reg = <1>;
    194	};
    195};
    196
    197&eth0 {
    198	status = "okay";
    199	ethernet0-port@0 {
    200		phy-handle = <&ethphy0>;
    201	};
    202};
    203
    204&eth1 {
    205	status = "okay";
    206	ethernet1-port@0 {
    207		phy-handle = <&ethphy1>;
    208	};
    209};