kirkwood-rd88f6281.dtsi (1919B)
1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Marvell RD88F6181 Common Board descrition 4 * 5 * Andrew Lunn <andrew@lunn.ch> 6 * 7 * This file contains the definitions that are common between the two 8 * variants of the Marvell Kirkwood Development Board. 9 */ 10 11#include "kirkwood.dtsi" 12#include "kirkwood-6281.dtsi" 13 14/ { 15 memory { 16 device_type = "memory"; 17 reg = <0x00000000 0x20000000>; 18 }; 19 20 chosen { 21 bootargs = "console=ttyS0,115200n8"; 22 stdout-path = &uart0; 23 }; 24 25 ocp@f1000000 { 26 pinctrl: pin-controller@10000 { 27 pinctrl-names = "default"; 28 29 pmx_sdio_cd: pmx-sdio-cd { 30 marvell,pins = "mpp28"; 31 marvell,function = "gpio"; 32 }; 33 }; 34 35 serial@12000 { 36 status = "okay"; 37 38 }; 39 40 sata@80000 { 41 status = "okay"; 42 nr-ports = <2>; 43 }; 44 mvsdio@90000 { 45 pinctrl-0 = <&pmx_sdio &pmx_sdio_cd>; 46 pinctrl-names = "default"; 47 status = "okay"; 48 cd-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; 49 /* No WP GPIO */ 50 }; 51 }; 52}; 53 54&nand { 55 status = "okay"; 56 57 partition@0 { 58 label = "u-boot"; 59 reg = <0x0000000 0x100000>; 60 read-only; 61 }; 62 63 partition@100000 { 64 label = "uImage"; 65 reg = <0x0100000 0x200000>; 66 }; 67 68 partition@300000 { 69 label = "rootfs"; 70 reg = <0x0300000 0x500000>; 71 }; 72}; 73 74&mdio { 75 status = "okay"; 76 77 switch: switch@0 { 78 compatible = "marvell,mv88e6085"; 79 #address-cells = <1>; 80 #size-cells = <0>; 81 82 ports { 83 #address-cells = <1>; 84 #size-cells = <0>; 85 86 port@0 { 87 reg = <0>; 88 label = "lan1"; 89 }; 90 91 port@1 { 92 reg = <1>; 93 label = "lan2"; 94 }; 95 96 port@2 { 97 reg = <2>; 98 label = "lan3"; 99 }; 100 101 port@3 { 102 reg = <3>; 103 label = "lan4"; 104 }; 105 106 port@5 { 107 reg = <5>; 108 label = "cpu"; 109 ethernet = <ð0port>; 110 fixed-link { 111 speed = <1000>; 112 full-duplex; 113 }; 114 }; 115 116 }; 117 }; 118}; 119 120ð0 { 121 status = "okay"; 122 ethernet0-port@0 { 123 speed = <1000>; 124 duplex = <1>; 125 }; 126}; 127 128&pciec { 129 status = "okay"; 130}; 131 132&pcie0 { 133 status = "okay"; 134};