cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

logicpd-som-lv-baseboard.dtsi (7343B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2
      3/ {
      4	gpio_keys {
      5		compatible = "gpio-keys";
      6		pinctrl-names = "default";
      7		pinctrl-0 = <&gpio_key_pins>;
      8
      9		sysboot2 {
     10			label = "gpio3";
     11			gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;	/* gpio_111 / uP_GPIO_3 */
     12			linux,code = <BTN_0>;
     13			wakeup-source;
     14		};
     15	};
     16
     17	sound {
     18		compatible = "ti,omap-twl4030";
     19		ti,model = "omap3logic";
     20		ti,mcbsp = <&mcbsp2>;
     21	};
     22
     23	leds {
     24		compatible = "gpio-leds";
     25		pinctrl-names = "default";
     26		pinctrl-0 = <&led_pins &led_pins_wkup>;
     27
     28		led1 {
     29			label = "led1";
     30			gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;	/* gpio133 */
     31			linux,default-trigger = "cpu0";
     32		};
     33
     34		led2 {
     35			label = "led2";
     36			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;	/* gpio11 */
     37			linux,default-trigger = "none";
     38		};
     39	};
     40};
     41
     42&vaux1 {
     43	regulator-min-microvolt = <3000000>;
     44	regulator-max-microvolt = <3000000>;
     45};
     46
     47&vaux4 {
     48	regulator-min-microvolt = <1800000>;
     49	regulator-max-microvolt = <1800000>;
     50};
     51
     52&mcbsp2 {
     53	status = "okay";
     54	pinctrl-names = "default";
     55	pinctrl-0 = <&mcbsp2_pins>;
     56};
     57
     58&charger {
     59	ti,bb-uvolt = <3200000>;
     60	ti,bb-uamp = <150>;
     61};
     62
     63&gpmc {
     64	ranges = <0 0 0x30000000 0x1000000	/* CS0: 16MB for NAND */
     65		  1 0 0x2c000000 0x1000000	/* CS1: 16MB for LAN9221 */
     66		  2 0 0x10000000 0x2000000>;    /* CS2: 32MB for NOR */
     67
     68	ethernet@gpmc {
     69		pinctrl-names = "default";
     70		pinctrl-0 = <&lan9221_pins>;
     71		interrupt-parent = <&gpio5>;
     72		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;		/* gpio_152 */
     73		reg = <1 0 0xff>;
     74	};
     75};
     76
     77&vpll2 {
     78	regulator-always-on;
     79};
     80
     81&dss {
     82	status = "okay";
     83	vdds_dsi-supply = <&vpll2>;
     84	vdda_video-supply = <&video_reg>;
     85	pinctrl-names = "default";
     86	pinctrl-0 = <&dss_dpi_pins1>;
     87	port {
     88		dpi_out: endpoint {
     89			remote-endpoint = <&lcd_in>;
     90			data-lines = <16>;
     91		};
     92	};
     93};
     94
     95/ {
     96	aliases {
     97		display0 = &lcd0;
     98	};
     99
    100	video_reg: video_reg {
    101		compatible = "regulator-fixed";
    102		regulator-name = "fixed-supply";
    103		regulator-min-microvolt = <3300000>;
    104		regulator-max-microvolt = <3300000>;
    105	};
    106
    107	lcd0: display {
    108		/* This isn't the exact LCD, but the timings meet spec */
    109		compatible = "logicpd,type28";
    110		pinctrl-names = "default";
    111		pinctrl-0 = <&lcd_enable_pin>;
    112		backlight = <&bl>;
    113		enable-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;
    114		port {
    115			lcd_in: endpoint {
    116				remote-endpoint = <&dpi_out>;
    117			};
    118		};
    119	};
    120
    121	bl: backlight {
    122		compatible = "pwm-backlight";
    123		pinctrl-names = "default";
    124		pinctrl-0 = <&backlight_pins>;
    125		pwms = <&twl_pwm 0 5000000>;
    126		brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
    127		default-brightness-level = <7>;
    128		enable-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; /* gpio_8 */
    129	};
    130};
    131
    132&mmc1 {
    133	interrupts-extended = <&intc 83 &omap3_pmx_core 0x11a>;
    134	pinctrl-names = "default";
    135	pinctrl-0 = <&mmc1_pins>;
    136	wp-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;		/* gpio_126 */
    137	cd-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;			/* gpio_110 */
    138	vmmc-supply = <&vmmc1>;
    139	bus-width = <4>;
    140	cap-power-off-card;
    141};
    142
    143&omap3_pmx_core {
    144	gpio_key_pins: pinmux_gpio_key_pins {
    145		pinctrl-single,pins = <
    146			OMAP3_CORE1_IOPAD(0x212e, PIN_INPUT_PULLUP | MUX_MODE4)	/* cam_xclkb.gpio_111 / uP_GPIO_3*/
    147		>;
    148	};
    149
    150	led_pins: pinmux_led_pins {
    151		pinctrl-single,pins = <
    152			OMAP3_CORE1_IOPAD(0x215e, PIN_OUTPUT_PULLUP | MUX_MODE4)	/* sdmmc2_dat1.gpio_133 / uP_GPIO_0 */
    153		>;
    154	};
    155
    156	lan9221_pins: pinmux_lan9221_pins {
    157		pinctrl-single,pins = <
    158			OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLUP | MUX_MODE4)	/* mcbsp4_clkx.gpio_152 */
    159		>;
    160	};
    161
    162	mmc1_pins: pinmux_mmc1_pins {
    163		pinctrl-single,pins = <
    164			OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT | MUX_MODE0)	/* sdmmc1_clk.sdmmc1_clk */
    165			OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT | MUX_MODE0)	/* sdmmc1_cmd.sdmmc1_cmd */
    166			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT | MUX_MODE0)	/* sdmmc1_dat0.sdmmc1_dat0 */
    167			OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT | MUX_MODE0)	/* sdmmc1_dat1.sdmmc1_dat1 */
    168			OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT | MUX_MODE0)	/* sdmmc1_dat2.sdmmc1_dat2 */
    169			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT | MUX_MODE0)	/* sdmmc1_dat3.sdmmc1_dat3 */
    170			OMAP3_CORE1_IOPAD(0x2132, PIN_INPUT_PULLUP | MUX_MODE4)	/* cam_strobe.gpio_126 */
    171			OMAP3_CORE1_IOPAD(0x212c, PIN_INPUT_PULLUP | MUX_MODE4)	/* cam_d11.gpio_110 */
    172		>;
    173	};
    174
    175	lcd_enable_pin: pinmux_lcd_enable_pin {
    176		pinctrl-single,pins = <
    177			OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE4)       /* mcbsp4_fs.gpio_155 */
    178		>;
    179	};
    180
    181	dss_dpi_pins1: pinmux_dss_dpi_pins1 {
    182		pinctrl-single,pins = <
    183			OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_pclk.dss_pclk */
    184			OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_hsync.dss_hsync */
    185			OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_vsync.dss_vsync */
    186			OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_acbias.dss_acbias */
    187
    188			OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data0.dss_data0 */
    189			OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data1.dss_data1 */
    190			OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data2.dss_data2 */
    191			OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data3.dss_data3 */
    192			OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data4.dss_data4 */
    193			OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data5.dss_data5 */
    194			OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data6.dss_data6 */
    195			OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data7.dss_data7 */
    196			OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data8.dss_data8 */
    197			OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data9.dss_data9 */
    198			OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data10.dss_data10 */
    199			OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data11.dss_data11 */
    200			OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data12.dss_data12 */
    201			OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data13.dss_data13 */
    202			OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data14.dss_data14 */
    203			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data15.dss_data15 */
    204		>;
    205	};
    206};
    207
    208&omap3_pmx_wkup {
    209	led_pins_wkup: pinmux_led_pins_wkup {
    210		pinctrl-single,pins = <
    211			OMAP3_WKUP_IOPAD(0x2a24, PIN_OUTPUT_PULLUP | MUX_MODE4)	/* jtag_emu0.gpio_11 / uP_GPIO_1 */
    212		>;
    213	};
    214
    215	backlight_pins: pinmux_backlight_pins {
    216		pinctrl-single,pins = <
    217			OMAP3_WKUP_IOPAD(0x2a16, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE4)       /* sys_boot6.gpio_8 */
    218		>;
    219	};
    220};
    221
    222
    223&uart1 {
    224	interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>;
    225};
    226
    227/* Wired to the tps65950 on the SOM, only the USB connector is on the devkit */
    228&usb_otg_hs {
    229	pinctrl-names = "default";
    230	pinctrl-0 = <&hsusb_otg_pins>;
    231	interface-type = <0>;
    232	usb-phy = <&usb2_phy>;
    233	phys = <&usb2_phy>;
    234	phy-names = "usb2-phy";
    235	mode = <3>;
    236	power = <50>;
    237};