cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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logicpd-torpedo-37xx-devkit.dts (2923B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2
      3/dts-v1/;
      4
      5#include "omap36xx.dtsi"
      6#include "logicpd-torpedo-som.dtsi"
      7#include "omap-gpmc-smsc9221.dtsi"
      8#include "logicpd-torpedo-baseboard.dtsi"
      9
     10/ {
     11	model = "LogicPD Zoom DM3730 Torpedo + Wireless Development Kit";
     12	compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3630", "ti,omap3";
     13
     14	wl12xx_vmmc: wl12xx_vmmc {
     15		compatible = "regulator-fixed";
     16		regulator-name = "vwl1271";
     17		regulator-min-microvolt = <1800000>;
     18		regulator-max-microvolt = <1800000>;
     19		gpio = <&gpio5 29 0>;   /* gpio157 */
     20		startup-delay-us = <70000>;
     21		enable-active-high;
     22		vin-supply = <&vmmc2>;
     23	};
     24};
     25
     26/*
     27 * Only found on the wireless SOM. For the SOM without wireless, the pins for
     28 * MMC3 can be routed with jumpers to the second MMC slot on the devkit and
     29 * gpio157 is not connected. So this should be OK to keep common for now,
     30 * probably device tree overlays is the way to go with the various SOM and
     31 * jumpering combinations for the long run.
     32 */
     33&mmc3 {
     34	interrupts-extended = <&intc 94 &omap3_pmx_core 0x136>;
     35	pinctrl-0 = <&mmc3_pins &mmc3_core2_pins>;
     36	pinctrl-names = "default";
     37	vmmc-supply = <&wl12xx_vmmc>;
     38	non-removable;
     39	bus-width = <4>;
     40	cap-power-off-card;
     41	#address-cells = <1>;
     42	#size-cells = <0>;
     43	wlcore: wlcore@2 {
     44		compatible = "ti,wl1283";
     45		reg = <2>;
     46		interrupt-parent = <&gpio5>;
     47		interrupts = <24 IRQ_TYPE_EDGE_RISING>; /* gpio 152 */
     48		ref-clock-frequency = <26000000>;
     49		tcxo-clock-frequency = <26000000>;
     50	};
     51};
     52
     53&uart2 {
     54	/delete-property/dma-names;
     55	bluetooth {
     56		compatible = "ti,wl1283-st";
     57		enable-gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>; /* gpio 162 */
     58		max-speed = <3000000>;
     59	};
     60};
     61
     62/* The DM3730 has a faster L3 than OMAP35, so increase pixel clock */
     63&mt9p031_out {
     64	pixel-clock-frequency = <90000000>;
     65};
     66
     67&omap3_pmx_core {
     68	mmc3_pins: pinmux_mm3_pins {
     69		pinctrl-single,pins = <
     70			OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE3)	/* sdmmc2_dat4.sdmmc3_dat0 */
     71			OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3)	/* sdmmc2_dat5.sdmmc3_dat1 */
     72			OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3)	/* sdmmc2_dat6.sdmmc3_dat2 */
     73			OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3)	/* sdmmc2_dat6.sdmmc3_dat3 */
     74			OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLUP | MUX_MODE4)	/* mcbsp4_clkx.gpio_152 */
     75			OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4)	/* mcbsp1_fsr.gpio_157 */
     76		>;
     77	};
     78};
     79
     80&omap3_pmx_core2 {
     81	mmc3_core2_pins: pinmux_mmc3_core2_pins {
     82		pinctrl-single,pins = <
     83			OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP | MUX_MODE2)   /* etk_clk.sdmmc3_clk */
     84			OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT_PULLUP | MUX_MODE2)   /* etk_ctl.sdmmc3_cmd */
     85		>;
     86	};
     87};
     88
     89/* The gpio muxing between omap3530 and dm3730 is different for GPIO_128 */
     90&omap3_pmx_wkup {
     91	isp1763_pins: pinmux_isp1763_pins {
     92		pinctrl-single,pins = <
     93			OMAP3_WKUP_IOPAD(0x2a58, PIN_INPUT_PULLUP | MUX_MODE4)	/* reserved.gpio_128 */
     94		>;
     95	};
     96};