cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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logicpd-torpedo-baseboard.dtsi (11918B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2
      3/ {
      4	gpio_keys {
      5		compatible = "gpio-keys";
      6		pinctrl-names = "default";
      7		pinctrl-0 = <&gpio_key_pins &gpio_key_pins_wkup>;
      8
      9		sysboot2 {
     10			label = "sysboot2";
     11			gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;	/* gpio2 */
     12			linux,code = <BTN_0>;
     13			wakeup-source;
     14		};
     15
     16		sysboot5 {
     17			label = "sysboot5";
     18			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;	/* gpio7 */
     19			linux,code = <BTN_1>;
     20			wakeup-source;
     21		};
     22
     23		gpio1 {
     24			label = "gpio1";
     25			gpios = <&gpio6 21 GPIO_ACTIVE_LOW>;	/* gpio181 */
     26			linux,code = <BTN_2>;
     27			wakeup-source;
     28		};
     29
     30		gpio2 {
     31			label = "gpio2";
     32			gpios = <&gpio6 18 GPIO_ACTIVE_LOW>;	/* gpio178 */
     33			linux,code = <BTN_3>;
     34			wakeup-source;
     35		};
     36	};
     37
     38	sound {
     39		compatible = "ti,omap-twl4030";
     40		ti,model = "omap3logic";
     41		ti,mcbsp = <&mcbsp2>;
     42	};
     43
     44	leds {
     45		compatible = "gpio-leds";
     46		pinctrl-names = "default";
     47		pinctrl-0 = <&led_pins>;
     48
     49		led1 {
     50			label = "led1";
     51			gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>;	/* gpio180 */
     52			linux,default-trigger = "cpu0";
     53		};
     54
     55		led2 {
     56			label = "led2";
     57			gpios = <&gpio6 19 GPIO_ACTIVE_HIGH>;	/* gpio179 */
     58			linux,default-trigger = "none";
     59		};
     60	};
     61
     62	pwm10: dmtimer-pwm {
     63		compatible = "ti,omap-dmtimer-pwm";
     64		pinctrl-names = "default";
     65		pinctrl-0 = <&pwm_pins>;
     66		ti,timers = <&timer10>;
     67		#pwm-cells = <3>;
     68		ti,clock-source = <0x01>;
     69	};
     70
     71};
     72
     73&vaux1 {
     74	regulator-min-microvolt = <3000000>;
     75	regulator-max-microvolt = <3000000>;
     76};
     77
     78&vaux4 {
     79	regulator-min-microvolt = <1800000>;
     80	regulator-max-microvolt = <1800000>;
     81};
     82
     83&mcbsp2 {
     84	pinctrl-names = "default";
     85	pinctrl-0 = <&mcbsp2_pins>;
     86	status = "okay";
     87};
     88
     89&charger {
     90	ti,bb-uvolt = <3200000>;
     91	ti,bb-uamp = <150>;
     92};
     93
     94&gpmc {
     95	ranges = <0 0 0x30000000 0x1000000	/* CS0: 16MB for NAND */
     96		  1 0 0x2c000000 0x1000000	/* CS1: 16MB for LAN9221 */
     97		  6 0 0x28000000 0x1000000>;	/* CS6: 16MB for ISP1763 */
     98
     99	ethernet@gpmc {
    100		pinctrl-names = "default";
    101		pinctrl-0 = <&lan9221_pins>;
    102		interrupt-parent = <&gpio5>;
    103		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;		/* gpio129 */
    104		reg = <1 0 0xff>;
    105	};
    106
    107	usb@6,0 {
    108		pinctrl-names = "default";
    109		pinctrl-0 = <&isp1763_pins>;
    110		compatible = "nxp,usb-isp1763";
    111		reg = <0x6 0x0 0xff>;
    112		interrupt-parent = <&gpio5>;
    113		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
    114		interrupt-names = "host";
    115		bus-width = <16>;
    116		dr_mode = "host";
    117		gpmc,mux-add-data = <0>;
    118		gpmc,device-width = <2>;
    119		gpmc,wait-pin = <0>;
    120		gpmc,burst-length = <4>;
    121		gpmc,cycle2cycle-samecsen;
    122		gpmc,cycle2cycle-diffcsen;
    123		gpmc,cs-on-ns = <0>;
    124		gpmc,cs-rd-off-ns = <45>;
    125		gpmc,cs-wr-off-ns = <45>;
    126		gpmc,adv-on-ns = <0>;
    127		gpmc,adv-rd-off-ns = <0>;
    128		gpmc,adv-wr-off-ns = <0>;
    129		gpmc,oe-on-ns = <0>;
    130		gpmc,oe-off-ns = <45>;
    131		gpmc,we-on-ns = <0>;
    132		gpmc,we-off-ns = <25>;
    133		gpmc,rd-cycle-ns = <60>;
    134		gpmc,wr-cycle-ns = <45>;
    135		gpmc,access-ns = <35>;
    136		gpmc,page-burst-access-ns = <0>;
    137		gpmc,bus-turnaround-ns = <0>;
    138		gpmc,cycle2cycle-delay-ns = <60>;
    139		gpmc,wait-monitoring-ns = <0>;
    140		gpmc,clk-activation-ns = <0>;
    141		gpmc,wr-data-mux-bus-ns = <5>;
    142		gpmc,wr-access-ns = <20>;
    143	};
    144};
    145
    146&hdqw1w {
    147	pinctrl-names = "default";
    148	pinctrl-0 = <&hdq_pins>;
    149};
    150
    151
    152&vpll2 {
    153	regulator-always-on;
    154};
    155
    156&dss {
    157	status = "okay";
    158	vdds_dsi-supply = <&vpll2>;
    159	vdda_video-supply = <&vpll2>;
    160	pinctrl-names = "default";
    161	pinctrl-0 = <&dss_dpi_pins1>;
    162	port {
    163		dpi_out: endpoint {
    164			remote-endpoint = <&lcd_in>;
    165			data-lines = <16>;
    166		};
    167	};
    168};
    169
    170/ {
    171	aliases {
    172		display0 = &lcd0;
    173	};
    174
    175	lcd0: display {
    176		/* This isn't the exact LCD, but the timings meet spec */
    177		compatible = "newhaven,nhd-4.3-480272ef-atxl";
    178		label = "15";
    179		pinctrl-names = "default";
    180		pinctrl-0 = <&panel_pwr_pins>;
    181		backlight = <&bl>;
    182		enable-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;
    183		port {
    184			lcd_in: endpoint {
    185				remote-endpoint = <&dpi_out>;
    186			};
    187		};
    188	};
    189
    190	bl: backlight {
    191		compatible = "pwm-backlight";
    192		pinctrl-names = "default";
    193		pinctrl-0 = <&backlight_pins>;
    194		pwms = <&pwm10 0 5000000 0>;
    195		brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
    196		default-brightness-level = <7>;
    197		enable-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>; /* gpio_154 */
    198	};
    199};
    200
    201&mmc1 {
    202	interrupts-extended = <&intc 83 &omap3_pmx_core 0x11a>;
    203	pinctrl-names = "default";
    204	pinctrl-0 = <&mmc1_pins &mmc1_cd>;
    205	cd-gpios = <&gpio4 31 GPIO_ACTIVE_LOW>;		/* gpio127 */
    206	vmmc-supply = <&vmmc1>;
    207	bus-width = <4>;
    208	cap-power-off-card;
    209};
    210
    211&omap3_pmx_core {
    212	gpio_key_pins: pinmux_gpio_key_pins {
    213		pinctrl-single,pins = <
    214			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLUP | MUX_MODE4)	/* mcspi2_clk.gpio_178 */
    215			OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLUP | MUX_MODE4)	/* mcspi2_cs0.gpio_181 */
    216		>;
    217	};
    218
    219	hdq_pins: hdq_pins {
    220		pinctrl-single,pins = <
    221			OMAP3_CORE1_IOPAD(0x21c6, PIN_INPUT_PULLUP | MUX_MODE0) /* hdq_sio */
    222		>;
    223	};
    224
    225	pwm_pins: pinmux_pwm_pins {
    226		pinctrl-single,pins = <
    227			OMAP3_CORE1_IOPAD(0x20B8, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE3)       /* gpmc_ncs5.gpt_10_pwm_evt */
    228		>;
    229	};
    230
    231	led_pins: pinmux_led_pins {
    232		pinctrl-single,pins = <
    233			OMAP3_CORE1_IOPAD(0x21d8, PIN_OUTPUT | MUX_MODE4)	/* gpio_179 */
    234			OMAP3_CORE1_IOPAD(0x21da, PIN_OUTPUT | MUX_MODE4)	/* gpio_180 */
    235		>;
    236	};
    237
    238	mmc1_pins: pinmux_mmc1_pins {
    239		pinctrl-single,pins = <
    240			OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT | MUX_MODE0)	/* sdmmc1_clk.sdmmc1_clk */
    241			OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT | MUX_MODE0)	/* sdmmc1_cmd.sdmmc1_cmd */
    242			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT | MUX_MODE0)	/* sdmmc1_dat0.sdmmc1_dat0 */
    243			OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT | MUX_MODE0)	/* sdmmc1_dat1.sdmmc1_dat1 */
    244			OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT | MUX_MODE0)	/* sdmmc1_dat2.sdmmc1_dat2 */
    245			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT | MUX_MODE0)	/* sdmmc1_dat3.sdmmc1_dat3 */
    246		>;
    247	};
    248
    249	tsc2004_pins: pinmux_tsc2004_pins {
    250		pinctrl-single,pins = <
    251			OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE4)	/* mcbsp4_dr.gpio_153 */
    252		>;
    253	};
    254
    255	backlight_pins: pinmux_backlight_pins {
    256		pinctrl-single,pins = <
    257			OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE4)       /* mcbsp4_dx.gpio_154 */
    258		>;
    259	};
    260
    261	isp_pins: pinmux_isp_pins {
    262		pinctrl-single,pins = <
    263			OMAP3_CORE1_IOPAD(0x210c, PIN_INPUT | MUX_MODE0)   /* cam_hs.cam_hs */
    264			OMAP3_CORE1_IOPAD(0x210e, PIN_INPUT | MUX_MODE0)   /* cam_vs.cam_vs */
    265			OMAP3_CORE1_IOPAD(0x2110, PIN_INPUT | MUX_MODE0)   /* cam_xclka.cam_xclka */
    266			OMAP3_CORE1_IOPAD(0x2112, PIN_INPUT | MUX_MODE0)   /* cam_pclk.cam_pclk */
    267
    268			OMAP3_CORE1_IOPAD(0x2116, PIN_INPUT | MUX_MODE0)   /* cam_d0.cam_d0 */
    269			OMAP3_CORE1_IOPAD(0x2118, PIN_INPUT | MUX_MODE0)   /* cam_d1.cam_d1 */
    270			OMAP3_CORE1_IOPAD(0x211a, PIN_INPUT | MUX_MODE0)   /* cam_d2.cam_d2 */
    271			OMAP3_CORE1_IOPAD(0x211c, PIN_INPUT | MUX_MODE0)   /* cam_d3.cam_d3 */
    272			OMAP3_CORE1_IOPAD(0x211e, PIN_INPUT | MUX_MODE0)   /* cam_d4.cam_d4 */
    273			OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT | MUX_MODE0)   /* cam_d5.cam_d5 */
    274			OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE0)   /* cam_d6.cam_d6 */
    275			OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE0)   /* cam_d7.cam_d7 */
    276		>;
    277	};
    278
    279	panel_pwr_pins: pinmux_panel_pwr_pins {
    280		pinctrl-single,pins = <
    281			OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE4)       /* mcbsp4_fs.gpio_155 */
    282		>;
    283	};
    284
    285	dss_dpi_pins1: pinmux_dss_dpi_pins1 {
    286		pinctrl-single,pins = <
    287			OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_pclk.dss_pclk */
    288			OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_hsync.dss_hsync */
    289			OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_vsync.dss_vsync */
    290			OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_acbias.dss_acbias */
    291
    292			OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data6.dss_data6 */
    293			OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data7.dss_data7 */
    294			OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data8.dss_data8 */
    295			OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data9.dss_data9 */
    296			OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data10.dss_data10 */
    297			OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data11.dss_data11 */
    298			OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data12.dss_data12 */
    299			OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data13.dss_data13 */
    300			OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data14.dss_data14 */
    301			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data15.dss_data15 */
    302			OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data16.dss_data16 */
    303			OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data17.dss_data17 */
    304
    305			OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3)   /* dss_data18.dss_data0 */
    306			OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3)   /* dss_data19.dss_data1 */
    307			OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3)   /* dss_data20.dss_data2 */
    308			OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3)   /* dss_data21.dss_data3 */
    309			OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3)   /* dss_data22.dss_data4 */
    310			OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3)   /* dss_data23.dss_data5 */
    311		>;
    312	};
    313};
    314
    315&omap3_pmx_wkup {
    316	gpio_key_pins_wkup: pinmux_gpio_key_pins_wkup {
    317		pinctrl-single,pins = <
    318			OMAP3_WKUP_IOPAD(0x2a0a, PIN_INPUT_PULLUP | MUX_MODE4)	/* sys_boot0.gpio_2 */
    319			OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT_PULLUP | MUX_MODE4)	/* sys_boot5.gpio_7 */
    320		>;
    321	};
    322
    323	lan9221_pins: pinmux_lan9221_pins {
    324		pinctrl-single,pins = <
    325			OMAP3_WKUP_IOPAD(0x2a5a, PIN_INPUT | MUX_MODE4)		/* reserved.gpio_129 */
    326		>;
    327	};
    328
    329	mmc1_cd: pinmux_mmc1_cd {
    330		pinctrl-single,pins = <
    331			OMAP3_WKUP_IOPAD(0x2a54, PIN_INPUT_PULLUP | MUX_MODE4)	/* reserved.gpio_127 */
    332		>;
    333	};
    334};
    335
    336&i2c2 {
    337	mt9p031@48 {
    338		compatible = "aptina,mt9p031";
    339		reg = <0x48>;
    340		clocks = <&isp 0>;
    341		vaa-supply = <&vaux4>;
    342		vdd-supply = <&vaux4>;
    343		vdd_io-supply = <&vaux4>;
    344		port {
    345			mt9p031_out: endpoint {
    346				input-clock-frequency = <24000000>;
    347				pixel-clock-frequency = <72000000>;
    348				remote-endpoint = <&ccdc_ep>;
    349			};
    350		};
    351	};
    352};
    353
    354&i2c3 {
    355	touchscreen: tsc2004@48 {
    356		compatible = "ti,tsc2004";
    357		reg = <0x48>;
    358		vio-supply = <&vaux1>;
    359		pinctrl-names = "default";
    360		pinctrl-0 = <&tsc2004_pins>;
    361		interrupts-extended = <&gpio5 25 IRQ_TYPE_EDGE_RISING>; /* gpio 153 */
    362
    363		touchscreen-fuzz-x = <4>;
    364		touchscreen-fuzz-y = <7>;
    365		touchscreen-fuzz-pressure = <2>;
    366		touchscreen-size-x = <4096>;
    367		touchscreen-size-y = <4096>;
    368		touchscreen-max-pressure = <2048>;
    369
    370		ti,x-plate-ohms = <280>;
    371		ti,esd-recovery-timeout-ms = <8000>;
    372	};
    373};
    374
    375&mcspi1 {
    376	at25@0 {
    377		compatible = "atmel,at25";
    378		reg = <0>;
    379		spi-max-frequency = <5000000>;
    380		spi-cpha;
    381		spi-cpol;
    382
    383		pagesize = <64>;
    384		size = <32768>;
    385		address-width = <16>;
    386	};
    387};
    388
    389&isp {
    390	pinctrl-names = "default";
    391	pinctrl-0 = <&isp_pins>;
    392	ports {
    393		port@0 {
    394			reg = <0>;
    395			ccdc_ep: endpoint {
    396				remote-endpoint = <&mt9p031_out>;
    397				bus-width = <8>;
    398				hsync-active = <1>;
    399				vsync-active = <1>;
    400				pclk-sample = <0>;
    401			};
    402		};
    403	};
    404};
    405
    406&uart1 {
    407	interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>;
    408};
    409
    410/* Wired to the tps65950 on the SOM, only the USB connector is on the devkit */
    411&usb_otg_hs {
    412	pinctrl-names = "default";
    413	pinctrl-0 = <&hsusb_otg_pins>;
    414	interface-type = <0>;
    415	usb-phy = <&usb2_phy>;
    416	phys = <&usb2_phy>;
    417	phy-names = "usb2-phy";
    418	mode = <3>;
    419	power = <50>;
    420};