cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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meson8-minix-neo-x8.dts (1470B)

      1// SPDX-License-Identifier: GPL-2.0 OR MIT
      2/*
      3 * Copyright 2014 Beniamino Galvani <b.galvani@gmail.com>
      4 */
      5
      6/dts-v1/;
      7#include <dt-bindings/gpio/gpio.h>
      8#include "meson8.dtsi"
      9
     10/ {
     11	model = "MINIX NEO-X8";
     12	compatible = "minix,neo-x8", "amlogic,meson8";
     13
     14	aliases {
     15		serial0 = &uart_AO;
     16	};
     17
     18	chosen {
     19		stdout-path = "serial0:115200n8";
     20	};
     21
     22	memory {
     23		device_type = "memory";
     24		reg = <0x40000000 0x80000000>;
     25	};
     26
     27	gpio-leds {
     28		compatible = "gpio-leds";
     29
     30		blue {
     31			label = "x8:blue:power";
     32			gpios = <&gpio_ao GPIO_TEST_N GPIO_ACTIVE_HIGH>;
     33		};
     34	};
     35};
     36
     37&uart_AO {
     38	status = "okay";
     39	pinctrl-0 = <&uart_ao_a_pins>;
     40	pinctrl-names = "default";
     41};
     42
     43&i2c_AO {
     44	status = "okay";
     45	pinctrl-0 = <&i2c_ao_pins>;
     46	pinctrl-names = "default";
     47
     48	pmic@32 {
     49		compatible = "ricoh,rn5t618";
     50		reg = <0x32>;
     51		system-power-controller;
     52
     53		regulators {
     54		};
     55	};
     56
     57	rtc@51 {
     58		compatible = "nxp,pcf8563";
     59		reg = <0x51>;
     60	};
     61};
     62
     63&spifc {
     64	status = "okay";
     65	pinctrl-0 = <&spi_nor_pins>;
     66	pinctrl-names = "default";
     67
     68	flash@0 {
     69		compatible = "mxicy,mx25l1606e";
     70		#address-cells = <1>;
     71		#size-cells = <1>;
     72		reg = <0>;
     73		spi-max-frequency = <30000000>;
     74
     75		partition@0 {
     76			label = "boot";
     77			reg = <0x0 0x100000>;
     78		};
     79
     80		partition@100000 {
     81			label = "env";
     82			reg = <0x100000 0x10000>;
     83		};
     84	};
     85};
     86
     87&ir_receiver {
     88	status = "okay";
     89	pinctrl-0 = <&ir_recv_pins>;
     90	pinctrl-names = "default";
     91};
     92
     93&ethmac {
     94	status = "okay";
     95	pinctrl-0 = <&eth_pins>;
     96	pnictrl-names = "default";
     97};