cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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meson8b-ec100.dts (10158B)


      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Copyright (c) 2018 Martin Blumenstingl <martin.blumenstingl@googlemail.com>.
      4 */
      5
      6/dts-v1/;
      7
      8#include <dt-bindings/gpio/gpio.h>
      9#include <dt-bindings/input/input.h>
     10
     11#include "meson8b.dtsi"
     12
     13/ {
     14	model = "Endless Computers Endless Mini";
     15	compatible = "endless,ec100", "amlogic,meson8b";
     16
     17	aliases {
     18		serial0 = &uart_AO;
     19	};
     20
     21	chosen {
     22		stdout-path = "serial0:115200n8";
     23	};
     24
     25	memory {
     26		device_type = "memory";
     27		reg = <0x40000000 0x40000000>;
     28	};
     29
     30	emmc_pwrseq: emmc-pwrseq {
     31		compatible = "mmc-pwrseq-emmc";
     32		reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
     33	};
     34
     35	gpio-keys {
     36		compatible = "gpio-keys-polled";
     37		#address-cells = <1>;
     38		#size-cells = <0>;
     39		poll-interval = <100>;
     40
     41		pal-switch {
     42			label = "pal";
     43			linux,input-type = <EV_SW>;
     44			linux,code = <KEY_SWITCHVIDEOMODE>;
     45			gpios = <&gpio GPIOH_7 GPIO_ACTIVE_LOW>;
     46		};
     47
     48		ntsc-switch {
     49			label = "ntsc";
     50			linux,input-type = <EV_SW>;
     51			linux,code = <KEY_SWITCHVIDEOMODE>;
     52			gpios = <&gpio GPIOH_8 GPIO_ACTIVE_HIGH>;
     53		};
     54
     55		power-button {
     56			label = "power";
     57			linux,code = <KEY_POWER>;
     58			gpios = <&gpio GPIOH_9 GPIO_ACTIVE_LOW>;
     59		};
     60	};
     61
     62	gpio-poweroff {
     63		compatible = "gpio-poweroff";
     64		/*
     65		 * shutdown is managed by the EC (embedded micro-controller)
     66		 * which is configured through GPIOAO_2 (poweroff GPIO) and
     67		 * GPIOAO_7 (power LED, which has to go LOW as well).
     68		 */
     69		gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
     70		timeout-ms = <20000>;
     71	};
     72
     73	leds {
     74		compatible = "gpio-leds";
     75
     76		power {
     77			label = "ec100:red:power";
     78			/*
     79			 * Needs to go LOW (together with the poweroff GPIO)
     80			 * during shutdown to allow the EC (embedded
     81			 * micro-controller) to shutdown the system. Setting
     82			 * the output to LOW signals the EC to start a
     83			 * "breathing"/pulsing effect until the power is fully
     84			 * turned off.
     85			 */
     86			gpios = <&gpio_ao GPIOAO_7 GPIO_ACTIVE_HIGH>;
     87			default-state = "on";
     88		};
     89	};
     90
     91	rtc32k_xtal: rtc32k-xtal-clk {
     92		/* X2 in the schematics */
     93		compatible = "fixed-clock";
     94		clock-frequency = <32768>;
     95		clock-output-names = "RTC32K";
     96		#clock-cells = <0>;
     97	};
     98
     99	sound {
    100		compatible = "amlogic,gx-sound-card";
    101		model = "M8B-EC100";
    102
    103		assigned-clocks = <&clkc CLKID_MPLL0>,
    104				  <&clkc CLKID_MPLL1>,
    105				  <&clkc CLKID_MPLL2>;
    106		assigned-clock-rates = <270950400>,
    107				       <294912000>,
    108				       <393216000>;
    109
    110		dai-link-0 {
    111			sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
    112		};
    113
    114		dai-link-1 {
    115			sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
    116			dai-format = "i2s";
    117			mclk-fs = <256>;
    118
    119			codec-0 {
    120				sound-dai = <&rt5640>;
    121			};
    122		};
    123	};
    124
    125	usb_vbus: regulator-usb-vbus {
    126		/*
    127		 * Silergy SY6288CCAC-GP 2A Power Distribution Switch.
    128		 */
    129		compatible = "regulator-fixed";
    130
    131		regulator-name = "USB_VBUS";
    132
    133		regulator-min-microvolt = <5000000>;
    134		regulator-max-microvolt = <5000000>;
    135
    136		vin-supply = <&vcc_5v>;
    137
    138		/*
    139		 * signal name from the schematics: USB_PWR_EN
    140		 */
    141		gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
    142		enable-active-high;
    143	};
    144
    145	vcc_5v: regulator-vcc5v {
    146		/*
    147		 * supplied by the main power input which called PWR_5V_STB
    148		 * in the schematics
    149		 */
    150		compatible = "regulator-fixed";
    151
    152		regulator-name = "VCC5V";
    153
    154		regulator-min-microvolt = <5000000>;
    155		regulator-max-microvolt = <5000000>;
    156
    157		/*
    158		 * signal name from the schematics: 3V3_5V_EN
    159		 */
    160		gpio = <&gpio GPIODV_29 GPIO_ACTIVE_LOW>;
    161
    162		regulator-boot-on;
    163		regulator-always-on;
    164	};
    165
    166	vcck: regulator-vcck {
    167		/*
    168		 * Silergy SY8089AAC-GP 2A continuous, 3A peak, 1MHz
    169		 * Synchronous Step Down Regulator.
    170		 */
    171		compatible = "pwm-regulator";
    172
    173		regulator-name = "VCCK";
    174		regulator-min-microvolt = <860000>;
    175		regulator-max-microvolt = <1140000>;
    176
    177		pwm-supply = <&vcc_5v>;
    178
    179		pwms = <&pwm_cd 0 1148 0>;
    180		pwm-dutycycle-range = <100 0>;
    181
    182		regulator-boot-on;
    183		regulator-always-on;
    184	};
    185
    186	vcc_1v8: regulator-vcc1v8 {
    187		/*
    188		 * ABLIC S-1339D18-M5001-GP
    189		 */
    190		compatible = "regulator-fixed";
    191
    192		regulator-name = "VCC1V8";
    193		regulator-min-microvolt = <1800000>;
    194		regulator-max-microvolt = <1800000>;
    195
    196		vin-supply = <&vcc_3v3>;
    197	};
    198
    199	vcc_3v3: regulator-vcc3v3 {
    200		/*
    201		 * Silergy SY8089AAC-GP 2A continuous, 3A peak, 1MHz
    202		 * Synchronous Step Down Regulator. Also called
    203		 * VDDIO_AO3.3V in the schematics.
    204		 */
    205		compatible = "regulator-fixed";
    206
    207		regulator-name = "VCC3V3";
    208		regulator-min-microvolt = <3300000>;
    209		regulator-max-microvolt = <3300000>;
    210
    211		vin-supply = <&vcc_5v>;
    212	};
    213
    214	vcc_ddr3: regulator-vcc-ddr3 {
    215		/*
    216		 * Silergy SY8089AAC-GP 2A continuous, 3A peak, 1MHz
    217		 * Synchronous Step Down Regulator. Also called
    218		 * DDR3_1.5V in the schematics.
    219		 */
    220		compatible = "regulator-fixed";
    221
    222		regulator-name = "VCC_DDR3_1V5";
    223		regulator-min-microvolt = <1500000>;
    224		regulator-max-microvolt = <1500000>;
    225
    226		vin-supply = <&vcc_5v>;
    227
    228		regulator-boot-on;
    229		regulator-always-on;
    230	};
    231
    232	vcc_rtc: regulator-vcc-rtc {
    233		/*
    234		 * Global Mixed-mode Technology Inc. G918T12U-GP
    235		 */
    236		compatible = "regulator-fixed";
    237
    238		regulator-name = "VCC_RTC";
    239		regulator-min-microvolt = <900000>;
    240		regulator-max-microvolt = <900000>;
    241
    242		/*
    243		 * When the board is powered then the input is VCC3V3,
    244		 * otherwise power is taken from the coin cell battery.
    245		 */
    246		vin-supply = <&vcc_3v3>;
    247	};
    248
    249	vddee: regulator-vddee {
    250		/*
    251		 * Silergy SY8089AAC-GP 2A continuous, 3A peak, 1MHz
    252		 * Synchronous Step Down Regulator. Also called VDDAO
    253		 * in a part of the schematics.
    254		 */
    255		compatible = "pwm-regulator";
    256
    257		regulator-name = "VDDEE";
    258		regulator-min-microvolt = <860000>;
    259		regulator-max-microvolt = <1140000>;
    260
    261		pwm-supply = <&vcc_5v>;
    262
    263		pwms = <&pwm_cd 1 1148 0>;
    264		pwm-dutycycle-range = <100 0>;
    265
    266		regulator-boot-on;
    267		regulator-always-on;
    268	};
    269};
    270
    271&aiu {
    272	status = "okay";
    273
    274	pinctrl-0 = <&i2s_am_clk_pins>, <&i2s_out_ao_clk_pins>,
    275		    <&i2s_out_lr_clk_pins>, <&i2s_out_ch01_ao_pins>;
    276	pinctrl-names = "default";
    277};
    278
    279&cpu0 {
    280	cpu-supply = <&vcck>;
    281};
    282
    283&ethmac {
    284	status = "okay";
    285
    286	pinctrl-0 = <&eth_rmii_pins>;
    287	pinctrl-names = "default";
    288
    289	phy-handle = <&eth_phy0>;
    290	phy-mode = "rmii";
    291
    292	mdio {
    293		compatible = "snps,dwmac-mdio";
    294		#address-cells = <1>;
    295		#size-cells = <0>;
    296
    297		eth_phy0: ethernet-phy@0 {
    298			/* IC Plus IP101A/G (0x02430c54) */
    299			reg = <0>;
    300
    301			reset-assert-us = <10000>;
    302			reset-deassert-us = <10000>;
    303			reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>;
    304
    305			icplus,select-interrupt;
    306			interrupt-parent = <&gpio_intc>;
    307			/* GPIOH_3 */
    308			interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
    309		};
    310	};
    311};
    312
    313&i2c_A {
    314	status = "okay";
    315	pinctrl-0 = <&i2c_a_pins>;
    316	pinctrl-names = "default";
    317
    318	rt5640: codec@1c {
    319		compatible = "realtek,rt5640";
    320
    321		reg = <0x1c>;
    322
    323		#sound-dai-cells = <0>;
    324
    325		interrupt-parent = <&gpio_intc>;
    326		interrupts = <13 IRQ_TYPE_EDGE_BOTH>; /* GPIOAO_13 */
    327
    328		/*
    329		 * TODO: realtek,ldo1-en-gpios is connected to GPIO_BSD_EN.
    330		 * We currently cannot configure this pin correctly.
    331		 * Luckily for us it's in the "right" state by default.
    332		 */
    333		realtek,in1-differential;
    334	};
    335};
    336
    337&mali {
    338	mali-supply = <&vddee>;
    339};
    340
    341&saradc {
    342	status = "okay";
    343	vref-supply = <&vcc_1v8>;
    344};
    345
    346&sdhc {
    347	status = "okay";
    348
    349	pinctrl-0 = <&sdxc_c_pins>;
    350	pinctrl-names = "default";
    351
    352	bus-width = <8>;
    353	max-frequency = <50000000>;
    354
    355	cap-mmc-highspeed;
    356	disable-wp;
    357	non-removable;
    358	no-sdio;
    359
    360	mmc-pwrseq = <&emmc_pwrseq>;
    361
    362	vmmc-supply = <&vcc_3v3>;
    363	vqmmc-supply = <&vcc_3v3>;
    364};
    365
    366&sdio {
    367	status = "okay";
    368
    369	pinctrl-0 = <&sd_b_pins>;
    370	pinctrl-names = "default";
    371
    372	/* SD card */
    373	sd_card_slot: slot@1 {
    374		compatible = "mmc-slot";
    375		reg = <1>;
    376		status = "okay";
    377
    378		bus-width = <4>;
    379		no-sdio;
    380		cap-mmc-highspeed;
    381		cap-sd-highspeed;
    382		disable-wp;
    383
    384		cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
    385
    386		vmmc-supply = <&vcc_3v3>;
    387	};
    388};
    389
    390&gpio_ao {
    391	gpio-line-names = "Linux_TX", "Linux_RX",
    392			  "SLP_S5_N", "USB2_OC_FLAG#",
    393			  "HUB_RST", "USB_PWR_EN",
    394			  "I2S_IN", "SLP_S1_N",
    395			  "TCK", "TMS", "TDI", "TDO",
    396			  "HDMI_CEC", "5640_IRQ",
    397			  "MUTE", "S805_TEST#";
    398};
    399
    400&gpio {
    401	gpio-line-names = /* Bank GPIOX */
    402			  "WIFI_SD_D0", "WIFI_SD_D1", "WIFI_SD_D2",
    403			  "WIFI_SD_D3", "BTPCM_DOUT", "BTPCM_DIN",
    404			  "BTPCM_SYNC", "BTPCM_CLK", "WIFI_SD_CLK",
    405			  "WIFI_SD_CMD", "WIFI_32K", "WIFI_PWREN",
    406			  "UART_B_TX", "UART_B_RX", "UART_B_CTS_N",
    407			  "UART_B_RTS_N", "BT_EN", "WIFI_WAKE_HOST",
    408			  /* Bank GPIOY */
    409			  "", "", "", "", "", "", "", "", "", "",
    410			  "", "",
    411			  /* Bank GPIODV */
    412			  "VCCK_PWM_C", "I2C_SDA_A", "I2C_SCL_A",
    413			  "I2C_SDA_B", "I2C_SCL_B", "VDDEE_PWM_D",
    414			  "VDDEE_PWM 3V3_5V_EN",
    415			  /* Bank GPIOH */
    416			  "HDMI_HPD", "HDMI_I2C_SDA", "HDMI_I2C_SCL",
    417			  "RMII_IRQ", "RMII_RST#", "RMII_TXD1",
    418			  "RMII_TXD0", "AV_select_1", "AV_select_2",
    419			  "MCU_Control_S",
    420			  /* Bank CARD */
    421			  "SD_D1_B", "SD_D0_B", "SD_CLK_8726MX",
    422			  "SD_CMD_8726MX", "SD_D3_B", "SD_D2_B",
    423			  "CARD_EN_DET (CARD_DET)",
    424			  /* Bank BOOT */
    425			  "NAND_D0 (EMMC)", "NAND_D1 (EMMC)",
    426			  "NAND_D2 (EMMC)", "NAND_D3 (EMMC)",
    427			  "NAND_D4 (EMMC)", "NAND_D5 (EMMC)",
    428			  "NAND_D6 (EMMC)", "NAND_D7 (EMMC)",
    429			  "NAND_CS1 (EMMC)", "NAND_CS2 iNAND_RS1 (EMMC)",
    430			  "NAND_nR/B iNAND_CMD (EMMC)", "NAND_ALE (EMMC)",
    431			  "NAND_CLE (EMMC)", "nRE_S1 NAND_nRE (EMMC)",
    432			  "nWE_S1 NAND_nWE (EMMC)",  "", "", "SPI_CS",
    433			  /* Bank DIF */
    434			  "RMII_RXD1", "RMII_RXD0", "RMII_CRS_DV",
    435			  "RMII_50M_IN", "GPIODIF_4", "GPIODIF_5",
    436			  "RMII_TXEN", "CPUETH_25MOUT", "RMII_MDC",
    437			  "RMII_MDIO";
    438};
    439
    440&pwm_cd {
    441	status = "okay";
    442	pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>;
    443	pinctrl-names = "default";
    444	clocks = <&xtal>, <&xtal>;
    445	clock-names = "clkin0", "clkin1";
    446};
    447
    448&rtc {
    449	status = "okay";
    450	clocks = <&rtc32k_xtal>;
    451	vdd-supply = <&vcc_rtc>;
    452};
    453
    454/* exposed through the pin headers labeled "URDUG1" on the top of the PCB */
    455&uart_AO {
    456	status = "okay";
    457	pinctrl-0 = <&uart_ao_a_pins>;
    458	pinctrl-names = "default";
    459};
    460
    461/*
    462 * connected to the Bluetooth part of the RTL8723BS SDIO wifi / Bluetooth
    463 * combo chip. This is only available on the variant with 2GB RAM.
    464 */
    465&uart_B {
    466	status = "okay";
    467	pinctrl-0 = <&uart_b0_pins>, <&uart_b0_cts_rts_pins>;
    468	pinctrl-names = "default";
    469	uart-has-rtscts;
    470};
    471
    472&usb1 {
    473	status = "okay";
    474	vbus-supply = <&usb_vbus>;
    475};
    476
    477&usb1_phy {
    478	status = "okay";
    479};