cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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motorola-mapphone-common.dtsi (18476B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/dts-v1/;
      3
      4#include <dt-bindings/input/input.h>
      5#include "omap443x.dtsi"
      6#include "motorola-cpcap-mapphone.dtsi"
      7
      8/ {
      9	chosen {
     10		stdout-path = &uart3;
     11	};
     12
     13	aliases {
     14		display0 = &lcd0;
     15		display1 = &hdmi0;
     16	};
     17
     18	/*
     19	 * We seem to have only 1021 MB accessible, 1021 - 1022 is locked,
     20	 * then 1023 - 1024 seems to contain mbm.
     21	 */
     22	memory {
     23		device_type = "memory";
     24		reg = <0x80000000 0x3fd00000>;	/* 1021 MB */
     25	};
     26
     27	/* Poweroff GPIO probably connected to CPCAP */
     28	gpio-poweroff {
     29		compatible = "gpio-poweroff";
     30		pinctrl-0 = <&poweroff_gpio>;
     31		pinctrl-names = "default";
     32		gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;	/* gpio50 */
     33	};
     34
     35	hdmi0: connector {
     36		compatible = "hdmi-connector";
     37		pinctrl-0 = <&hdmi_hpd_gpio>;
     38		pinctrl-names = "default";
     39		label = "hdmi";
     40		type = "d";
     41
     42		hpd-gpios = <&gpio2 31 GPIO_ACTIVE_HIGH>;	/* gpio63 */
     43
     44		port {
     45			hdmi_connector_in: endpoint {
     46				remote-endpoint = <&hdmi_out>;
     47			};
     48		};
     49	};
     50
     51	/*
     52	 * HDMI 5V regulator probably sourced from battery. Let's keep
     53	 * keep this as always enabled for HDMI to work until we've
     54	 * figured what the encoder chip is.
     55	 */
     56	hdmi_regulator: regulator-hdmi {
     57		compatible = "regulator-fixed";
     58		regulator-name = "hdmi";
     59		regulator-min-microvolt = <5000000>;
     60		regulator-max-microvolt = <5000000>;
     61		gpio = <&gpio2 27 GPIO_ACTIVE_HIGH>;	/* gpio59 */
     62		enable-active-high;
     63		regulator-always-on;
     64	};
     65
     66	/* FS USB Host PHY on port 1 for mdm6600 */
     67	fsusb1_phy: usb-phy@1 {
     68		compatible = "motorola,mapphone-mdm6600";
     69		pinctrl-0 = <&usb_mdm6600_pins>;
     70		pinctrl-names = "default";
     71		enable-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;     /* gpio_95 */
     72		power-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;	/* gpio_54 */
     73		reset-gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>;	/* gpio_49 */
     74		/* mode: gpio_148 gpio_149 */
     75		motorola,mode-gpios = <&gpio5 20 GPIO_ACTIVE_HIGH>,
     76				      <&gpio5 21 GPIO_ACTIVE_HIGH>;
     77		/* cmd: gpio_103 gpio_104 gpio_142 */
     78		motorola,cmd-gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>,
     79				     <&gpio4 8 GPIO_ACTIVE_HIGH>,
     80				     <&gpio5 14 GPIO_ACTIVE_HIGH>;
     81		/* status: gpio_52 gpio_53 gpio_55 */
     82		motorola,status-gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>,
     83					<&gpio2 21 GPIO_ACTIVE_HIGH>,
     84					<&gpio2 23 GPIO_ACTIVE_HIGH>;
     85		#phy-cells = <0>;
     86	};
     87
     88	/* HS USB host TLL nop-phy on port 2 for w3glte */
     89	hsusb2_phy: usb-phy@2 {
     90		compatible = "usb-nop-xceiv";
     91		#phy-cells = <0>;
     92	};
     93
     94	/* LCD regulator from sw5 source */
     95	lcd_regulator: regulator-lcd {
     96		compatible = "regulator-fixed";
     97		regulator-name = "lcd";
     98		regulator-min-microvolt = <5050000>;
     99		regulator-max-microvolt = <5050000>;
    100		gpio = <&gpio4 0 GPIO_ACTIVE_HIGH>;	/* gpio96 */
    101		enable-active-high;
    102		vin-supply = <&sw5>;
    103	};
    104
    105	/* This is probably coming straight from the battery.. */
    106	wl12xx_vmmc: regulator-wl12xx {
    107		compatible = "regulator-fixed";
    108		regulator-name = "vwl1271";
    109		regulator-min-microvolt = <1650000>;
    110		regulator-max-microvolt = <1650000>;
    111		gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;	/* gpio94 */
    112		startup-delay-us = <70000>;
    113		enable-active-high;
    114	};
    115
    116	soundcard {
    117		compatible = "audio-graph-card";
    118		label = "Mapphone Audio";
    119
    120		widgets =
    121			"Speaker", "Earpiece",
    122			"Speaker", "Loudspeaker",
    123			"Headphone", "Headphone Jack",
    124			"Microphone", "Internal Mic";
    125
    126		routing =
    127			"Earpiece", "EP",
    128			"Loudspeaker", "SPKR",
    129			"Headphone Jack", "HSL",
    130			"Headphone Jack", "HSR",
    131			"MICR", "Internal Mic";
    132
    133		dais = <&mcbsp2_port>, <&mcbsp3_port>;
    134	};
    135
    136	pwm8: dmtimer-pwm-8 {
    137		pinctrl-names = "default";
    138		pinctrl-0 = <&vibrator_direction_pin>;
    139
    140		compatible = "ti,omap-dmtimer-pwm";
    141		#pwm-cells = <3>;
    142		ti,timers = <&timer8>;
    143		ti,clock-source = <0x01>;
    144	};
    145
    146	pwm9: dmtimer-pwm-9 {
    147		pinctrl-names = "default";
    148		pinctrl-0 = <&vibrator_enable_pin>;
    149
    150		compatible = "ti,omap-dmtimer-pwm";
    151		#pwm-cells = <3>;
    152		ti,timers = <&timer9>;
    153		ti,clock-source = <0x01>;
    154	};
    155
    156	vibrator {
    157		compatible = "pwm-vibrator";
    158		pwms = <&pwm9 0 10000000 0>, <&pwm8 0 10000000 0>;
    159		pwm-names = "enable", "direction";
    160		direction-duty-cycle-ns = <10000000>;
    161	};
    162
    163	backlight: backlight {
    164		compatible = "led-backlight";
    165
    166		leds = <&backlight_led>;
    167		brightness-levels = <31 63 95 127 159 191 223 255>;
    168		default-brightness-level = <6>;
    169	};
    170};
    171
    172&cpu_thermal {
    173	polling-delay = <10000>; /* milliseconds */
    174};
    175
    176&cpu_alert0 {
    177        temperature = <80000>; /* millicelsius */
    178};
    179
    180&cpu0 {
    181        /*
    182	 * Note that the 1.2GiHz mode is enabled for all SoC variants for
    183	 * the Motorola Android Linux v3.0.8 based kernel.
    184	 */
    185        operating-points = <
    186	        /* kHz    uV */
    187	        300000  1025000
    188	        600000  1200000
    189	        800000  1313000
    190	        1008000 1375000
    191		1200000 1375000
    192        >;
    193};
    194
    195&dss {
    196	status = "okay";
    197};
    198
    199&dsi1 {
    200	status = "okay";
    201	vdd-supply = <&vcsi>;
    202
    203	port {
    204		dsi1_out_ep: endpoint {
    205			remote-endpoint = <&lcd0_in>;
    206			lanes = <0 1 2 3 4 5>;
    207		};
    208	};
    209
    210	lcd0: panel@0 {
    211		compatible = "motorola,droid4-panel", "panel-dsi-cm";
    212		reg = <0>;
    213		label = "lcd0";
    214		vddi-supply = <&lcd_regulator>;
    215		reset-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;	/* gpio101 */
    216
    217		backlight = <&backlight>;
    218
    219		width-mm = <50>;
    220		height-mm = <89>;
    221		rotation = <90>;
    222
    223		panel-timing {
    224			clock-frequency = <0>;		/* Calculated by dsi */
    225
    226			hback-porch = <2>;
    227			hactive = <540>;
    228			hfront-porch = <0>;
    229			hsync-len = <2>;
    230
    231			vback-porch = <1>;
    232			vactive = <960>;
    233			vfront-porch = <0>;
    234			vsync-len = <1>;
    235
    236			hsync-active = <0>;
    237			vsync-active = <0>;
    238			de-active = <1>;
    239			pixelclk-active = <1>;
    240		};
    241
    242		port {
    243			lcd0_in: endpoint {
    244				remote-endpoint = <&dsi1_out_ep>;
    245			};
    246		};
    247	};
    248};
    249
    250&hdmi {
    251	status = "okay";
    252	pinctrl-0 = <&dss_hdmi_pins>;
    253	pinctrl-names = "default";
    254	vdda-supply = <&vdac>;
    255
    256	port {
    257		hdmi_out: endpoint {
    258			remote-endpoint = <&hdmi_connector_in>;
    259			lanes = <1 0 3 2 5 4 7 6>;
    260		};
    261	};
    262};
    263
    264/* Battery NVRAM on 1-wire handled by w1_ds250x driver */
    265&hdqw1w {
    266	pinctrl-0 = <&hdq_pins>;
    267	pinctrl-names = "default";
    268	ti,mode = "1w";
    269};
    270
    271&i2c1 {
    272	tmp105@48 {
    273		compatible = "ti,tmp105";
    274		reg = <0x48>;
    275		pinctrl-0 = <&tmp105_irq>;
    276		pinctrl-names = "default";
    277		/* kpd_row0.gpio_178 */
    278		interrupts-extended = <&gpio6 18 IRQ_TYPE_EDGE_FALLING
    279				       &omap4_pmx_core 0x14e>;
    280		interrupt-names = "irq", "wakeup";
    281		wakeup-source;
    282	};
    283};
    284
    285&mmc1 {
    286	vmmc-supply = <&vwlan2>;
    287	bus-width = <4>;
    288	cd-gpios = <&gpio6 16 GPIO_ACTIVE_LOW>;	/* gpio176 */
    289};
    290
    291&mmc2 {
    292	vmmc-supply = <&vsdio>;
    293	bus-width = <8>;
    294	ti,non-removable;
    295};
    296
    297&mmc3 {
    298	pinctrl-names = "default";
    299	pinctrl-0 = <&mmc3_pins>;
    300	vmmc-supply = <&wl12xx_vmmc>;
    301	/* uart2_tx.sdmmc3_dat1 pad as wakeirq */
    302	interrupts-extended = <&wakeupgen GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH
    303			       &omap4_pmx_core 0xde>;
    304	interrupt-names = "irq", "wakeup";
    305	non-removable;
    306	bus-width = <4>;
    307	cap-power-off-card;
    308	keep-power-in-suspend;
    309
    310	#address-cells = <1>;
    311	#size-cells = <0>;
    312	wlcore: wlcore@2 {
    313		compatible = "ti,wl1285";
    314		reg = <2>;
    315		/* gpio_100 with gpmc_wait2 pad as wakeirq */
    316		interrupts-extended = <&gpio4 4 IRQ_TYPE_LEVEL_HIGH>,
    317				      <&omap4_pmx_core 0x4e>;
    318		interrupt-names = "irq", "wakeup";
    319		ref-clock-frequency = <26000000>;
    320		tcxo-clock-frequency = <26000000>;
    321	};
    322};
    323
    324&i2c2 {
    325	touchscreen@4a {
    326		compatible = "atmel,maxtouch";
    327		reg = <0x4a>;
    328		pinctrl-names = "default";
    329		pinctrl-0 = <&touchscreen_pins>;
    330
    331		reset-gpios = <&gpio6 13 GPIO_ACTIVE_LOW>; /* gpio173 */
    332
    333		/* gpio_183 with sys_nirq2 pad as wakeup */
    334		interrupts-extended = <&gpio6 23 IRQ_TYPE_LEVEL_LOW>,
    335				      <&omap4_pmx_core 0x160>;
    336		interrupt-names = "irq", "wakeup";
    337		wakeup-source;
    338	};
    339
    340	isl29030@44 {
    341		compatible = "isil,isl29030";
    342		reg = <0x44>;
    343
    344		pinctrl-names = "default";
    345		pinctrl-0 = <&als_proximity_pins>;
    346
    347		interrupt-parent = <&gpio6>;
    348		interrupts = <17 IRQ_TYPE_LEVEL_LOW>; /* gpio177 */
    349	};
    350};
    351
    352&omap4_pmx_core {
    353
    354	/* hdmi_hpd.gpio_63 */
    355	hdmi_hpd_gpio: pinmux_hdmi_hpd_pins {
    356		pinctrl-single,pins = <
    357		OMAP4_IOPAD(0x098, PIN_INPUT | MUX_MODE3)
    358		>;
    359	};
    360
    361	hdq_pins: pinmux_hdq_pins {
    362		pinctrl-single,pins = <
    363		/* 0x4a100120 hdq_sio.hdq_sio aa27 */
    364		OMAP4_IOPAD(0x120, PIN_INPUT | MUX_MODE0)
    365		>;
    366	};
    367
    368	/* hdmi_cec.hdmi_cec, hdmi_scl.hdmi_scl, hdmi_sda.hdmi_sda */
    369	dss_hdmi_pins: pinmux_dss_hdmi_pins {
    370		pinctrl-single,pins = <
    371		OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0)
    372		OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0)
    373		OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0)
    374		>;
    375	};
    376
    377	/*
    378	 * Android uses PIN_OFF_INPUT_PULLDOWN | PIN_INPUT_PULLUP | MUX_MODE3
    379	 * for gpio_100, but the internal pull makes wlan flakey on some
    380	 * devices. Off mode value should be tested if we have off mode working
    381	 * later on.
    382	 */
    383	mmc3_pins: pinmux_mmc3_pins {
    384		pinctrl-single,pins = <
    385		/* 0x4a10008e gpmc_wait2.gpio_100 d23 */
    386		OMAP4_IOPAD(0x08e, PIN_INPUT | MUX_MODE3)
    387
    388		/* 0x4a100102 abe_mcbsp1_dx.sdmmc3_dat2 ab25 */
    389		OMAP4_IOPAD(0x102, PIN_INPUT_PULLUP | MUX_MODE1)
    390
    391		/* 0x4a100104 abe_mcbsp1_fsx.sdmmc3_dat3 ac27 */
    392		OMAP4_IOPAD(0x104, PIN_INPUT_PULLUP | MUX_MODE1)
    393
    394		/* 0x4a100118 uart2_cts.sdmmc3_clk ab26 */
    395		OMAP4_IOPAD(0x118, PIN_INPUT | MUX_MODE1)
    396
    397		/* 0x4a10011a uart2_rts.sdmmc3_cmd ab27 */
    398		OMAP4_IOPAD(0x11a, PIN_INPUT_PULLUP | MUX_MODE1)
    399
    400		/* 0x4a10011c uart2_rx.sdmmc3_dat0 aa25 */
    401		OMAP4_IOPAD(0x11c, PIN_INPUT_PULLUP | MUX_MODE1)
    402
    403		/* 0x4a10011e uart2_tx.sdmmc3_dat1 aa26 */
    404		OMAP4_IOPAD(0x11e, PIN_INPUT_PULLUP | MUX_MODE1)
    405		>;
    406	};
    407
    408	/* gpmc_ncs0.gpio_50 */
    409	poweroff_gpio: pinmux_poweroff_pins {
    410		pinctrl-single,pins = <
    411		OMAP4_IOPAD(0x074, PIN_OUTPUT_PULLUP | MUX_MODE3)
    412		>;
    413	};
    414
    415	/* kpd_row0.gpio_178 */
    416	tmp105_irq: pinmux_tmp105_irq {
    417		pinctrl-single,pins = <
    418		OMAP4_IOPAD(0x18e, PIN_INPUT_PULLUP | MUX_MODE3)
    419		>;
    420	};
    421
    422	usb_gpio_mux_sel1: pinmux_usb_gpio_mux_sel1_pins {
    423		/* gpio_60 */
    424		pinctrl-single,pins = <
    425		OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3)
    426		>;
    427	};
    428
    429	touchscreen_pins: pinmux_touchscreen_pins {
    430		pinctrl-single,pins = <
    431		OMAP4_IOPAD(0x180, PIN_OUTPUT | MUX_MODE3)
    432		OMAP4_IOPAD(0x1a0, PIN_INPUT_PULLUP | MUX_MODE3)
    433		>;
    434	};
    435
    436	als_proximity_pins: pinmux_als_proximity_pins {
    437		pinctrl-single,pins = <
    438		OMAP4_IOPAD(0x18c, PIN_INPUT_PULLUP | MUX_MODE3)
    439		>;
    440	};
    441
    442	usb_mdm6600_pins: pinmux_usb_mdm6600_pins {
    443		pinctrl-single,pins = <
    444		/* enable 0x4a1000d8 usbb1_ulpitll_dat7.gpio_95 ag16 */
    445		OMAP4_IOPAD(0x0d8, PIN_INPUT | MUX_MODE3)
    446
    447		/* power 0x4a10007c gpmc_nwp.gpio_54 c25 */
    448		OMAP4_IOPAD(0x07c, PIN_OUTPUT | MUX_MODE3)
    449
    450		/* reset 0x4a100072 gpmc_a25.gpio_49 d20 */
    451		OMAP4_IOPAD(0x072, PIN_OUTPUT | MUX_MODE3)
    452
    453		/* mode0/bpwake 0x4a10014e sdmmc5_dat1.gpio_148 af4 */
    454		OMAP4_IOPAD(0x14e, PIN_OUTPUT | MUX_MODE3)
    455
    456		/* mode1/apwake 0x4a100150 sdmmc5_dat2.gpio_149 ag3 */
    457		OMAP4_IOPAD(0x150, PIN_OFF_OUTPUT_LOW | PIN_INPUT | MUX_MODE3)
    458
    459		/* status0 0x4a10007e gpmc_clk.gpio_55 b22 */
    460		OMAP4_IOPAD(0x07e, PIN_INPUT | MUX_MODE3)
    461
    462		/* status1 0x4a10007a gpmc_ncs3.gpio_53 c22 */
    463		OMAP4_IOPAD(0x07a, PIN_INPUT | MUX_MODE3)
    464
    465		/* status2 0x4a100078 gpmc_ncs2.gpio_52 d21 */
    466		OMAP4_IOPAD(0x078, PIN_INPUT | MUX_MODE3)
    467
    468		/* cmd0 0x4a100094 gpmc_ncs6.gpio_103 c24 */
    469		OMAP4_IOPAD(0x094, PIN_OUTPUT | MUX_MODE3)
    470
    471		/* cmd1 0x4a100096 gpmc_ncs7.gpio_104 d24 */
    472		OMAP4_IOPAD(0x096, PIN_OUTPUT | MUX_MODE3)
    473
    474		/* cmd2 0x4a100142 uart3_rts_sd.gpio_142 f28 */
    475		OMAP4_IOPAD(0x142, PIN_OUTPUT | MUX_MODE3)
    476		>;
    477	};
    478
    479	usb_ulpi_pins: pinmux_usb_ulpi_pins {
    480		pinctrl-single,pins = <
    481		OMAP4_IOPAD(0x196, MUX_MODE7)
    482		OMAP4_IOPAD(0x198, MUX_MODE7)
    483		OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE0)
    484		OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE0)
    485		OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE0)
    486		OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE0)
    487		OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP | MUX_MODE0)
    488		OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP | MUX_MODE0)
    489		OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE0)
    490		OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE0)
    491		OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE0)
    492		OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE0)
    493		OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE0)
    494		OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE0)
    495		>;
    496	};
    497
    498	/* usb0_otg_dp and usb0_otg_dm */
    499	usb_utmi_pins: pinmux_usb_utmi_pins {
    500		pinctrl-single,pins = <
    501		OMAP4_IOPAD(0x196, PIN_INPUT | MUX_MODE0)
    502		OMAP4_IOPAD(0x198, PIN_INPUT | MUX_MODE0)
    503		OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE7)
    504		OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE7)
    505		OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE7)
    506		OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE7)
    507		OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP | MUX_MODE7)
    508		OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP | MUX_MODE7)
    509		OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE7)
    510		OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE7)
    511		OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE7)
    512		OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE7)
    513		OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE7)
    514		OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7)
    515		>;
    516	};
    517
    518	/*
    519	 * Note that the v3.0.8 stock userspace dynamically remuxes uart1
    520	 * rts pin probably for PM purposes to PIN_INPUT_PULLUP | MUX_MODE7
    521	 * when not used. If needed, we can add rts pin remux later based
    522	 * on power measurements.
    523	 */
    524	uart1_pins: pinmux_uart1_pins {
    525		pinctrl-single,pins = <
    526		/* 0x4a10013c mcspi1_cs2.uart1_cts ag23 */
    527		OMAP4_IOPAD(0x13c, PIN_INPUT_PULLUP | MUX_MODE1)
    528
    529		/* 0x4a10013e mcspi1_cs3.uart1_rts ah23 */
    530		OMAP4_IOPAD(0x13e, MUX_MODE1)
    531
    532		/* 0x4a100140 uart3_cts_rctx.uart1_tx f27 */
    533		OMAP4_IOPAD(0x140, PIN_OUTPUT | MUX_MODE1)
    534
    535		/* 0x4a1001ca dpm_emu14.uart1_rx aa3 */
    536		OMAP4_IOPAD(0x1ca, PIN_INPUT_PULLUP | MUX_MODE2)
    537		>;
    538	};
    539
    540	/* uart3_tx_irtx and uart3_rx_irrx */
    541	uart3_pins: pinmux_uart3_pins {
    542		pinctrl-single,pins = <
    543		OMAP4_IOPAD(0x196, MUX_MODE7)
    544		OMAP4_IOPAD(0x198, MUX_MODE7)
    545		OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE7)
    546		OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE7)
    547		OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE7)
    548		OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE7)
    549		OMAP4_IOPAD(0x1ba, MUX_MODE2)
    550		OMAP4_IOPAD(0x1bc, PIN_INPUT | MUX_MODE2)
    551		OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE7)
    552		OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE7)
    553		OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE7)
    554		OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE7)
    555		OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE7)
    556		OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7)
    557		>;
    558	};
    559
    560	uart4_pins: pinmux_uart4_pins {
    561		pinctrl-single,pins = <
    562		OMAP4_IOPAD(0x15c, PIN_INPUT | MUX_MODE0)		/* uart4_rx */
    563		OMAP4_IOPAD(0x15e, PIN_OUTPUT | MUX_MODE0)		/* uart4_tx */
    564		OMAP4_IOPAD(0x110, PIN_INPUT_PULLUP | MUX_MODE5)	/* uart4_cts */
    565		OMAP4_IOPAD(0x112, PIN_OUTPUT_PULLUP | MUX_MODE5)	/* uart4_rts */
    566		>;
    567	};
    568
    569	mcbsp2_pins: pinmux_mcbsp2_pins {
    570		pinctrl-single,pins = <
    571		OMAP4_IOPAD(0x0f6, PIN_INPUT | MUX_MODE0)	/* abe_mcbsp2_clkx */
    572		OMAP4_IOPAD(0x0f8, PIN_INPUT | MUX_MODE0)	/* abe_mcbsp2_dr */
    573		OMAP4_IOPAD(0x0fa, PIN_OUTPUT | MUX_MODE0)	/* abe_mcbsp2_dx */
    574		OMAP4_IOPAD(0x0fc, PIN_INPUT | MUX_MODE0)	/* abe_mcbsp2_fsx */
    575		>;
    576	};
    577
    578	mcbsp3_pins: pinmux_mcbsp3_pins {
    579		pinctrl-single,pins = <
    580		OMAP4_IOPAD(0x106, PIN_INPUT | MUX_MODE1)	/* abe_mcbsp3_dr */
    581		OMAP4_IOPAD(0x108, PIN_OUTPUT | MUX_MODE1)	/* abe_mcbsp3_dx */
    582		OMAP4_IOPAD(0x10a, PIN_INPUT | MUX_MODE1)	/* abe_mcbsp3_clkx */
    583		OMAP4_IOPAD(0x10c, PIN_INPUT | MUX_MODE1)	/* abe_mcbsp3_fsx */
    584		>;
    585	};
    586
    587	vibrator_direction_pin: pinmux_vibrator_direction_pin {
    588		pinctrl-single,pins = <
    589		OMAP4_IOPAD(0x1ce, PIN_OUTPUT | MUX_MODE1)	/* dmtimer8_pwm_evt (gpio_27) */
    590		>;
    591	};
    592
    593	vibrator_enable_pin: pinmux_vibrator_enable_pin {
    594		pinctrl-single,pins = <
    595		OMAP4_IOPAD(0X1d0, PIN_OUTPUT | MUX_MODE1)	/* dmtimer9_pwm_evt (gpio_28) */
    596		>;
    597	};
    598};
    599
    600&omap4_pmx_wkup {
    601	usb_gpio_mux_sel2: pinmux_usb_gpio_mux_sel2_pins {
    602		/* gpio_wk0 */
    603		pinctrl-single,pins = <
    604		OMAP4_IOPAD(0x040, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
    605		>;
    606	};
    607};
    608
    609/* RNG is used by secure mode and not accessible */
    610&rng_target {
    611	status = "disabled";
    612};
    613
    614/* Configure pwm clock source for timers 8 & 9 */
    615&timer8 {
    616	assigned-clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>;
    617	assigned-clock-parents = <&sys_clkin_ck>;
    618};
    619
    620&timer9 {
    621	assigned-clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>;
    622	assigned-clock-parents = <&sys_clkin_ck>;
    623};
    624
    625/*
    626 * The uart1 port is wired to mdm6600 with rts and cts. The modem uses gpio_149
    627 * for wake-up events for both the USB PHY and the UART. We can use gpio_149
    628 * pad as the shared wakeirq for the UART rather than the RX or CTS pad as we
    629 * have gpio_149 trigger before the UART transfer starts.
    630 */
    631&uart1 {
    632	pinctrl-names = "default";
    633	pinctrl-0 = <&uart1_pins>;
    634	interrupts-extended = <&wakeupgen GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH
    635			       &omap4_pmx_core 0x110>;
    636	uart-has-rtscts;
    637	current-speed = <115200>;
    638};
    639
    640&uart3 {
    641	interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH
    642			       &omap4_pmx_core 0x17c>;
    643};
    644
    645&uart4 {
    646	pinctrl-names = "default";
    647	pinctrl-0 = <&uart4_pins>;
    648
    649	bluetooth {
    650		compatible = "ti,wl1285-st";
    651		enable-gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>; /* gpio 174 */
    652		max-speed = <3686400>;
    653	};
    654};
    655
    656&usbhsohci {
    657	phys = <&fsusb1_phy>;
    658	phy-names = "usb";
    659};
    660
    661&usbhsehci {
    662	phys = <&hsusb2_phy>;
    663};
    664
    665&usbhshost {
    666	port1-mode = "ohci-phy-4pin-dpdm";
    667	port2-mode = "ehci-tll";
    668};
    669
    670/* Internal UTMI+ PHY used for OTG, CPCAP ULPI PHY for detection and charger */
    671&usb_otg_hs {
    672	interface-type = <1>;
    673	mode = <3>;
    674
    675	/*
    676	 * Max 300 mA steps based on similar PMIC MC13783UG.pdf "Table 10-4.
    677	 * VBUS Regulator Main Characteristics". Binding uses 2 mA units.
    678	 */
    679	power = <150>;
    680};
    681
    682&i2c4 {
    683	ak8975: magnetometer@c {
    684		compatible = "asahi-kasei,ak8975";
    685		reg = <0x0c>;
    686
    687		vdd-supply = <&vhvio>;
    688
    689		interrupt-parent = <&gpio6>;
    690		interrupts = <15 IRQ_TYPE_EDGE_RISING>; /* gpio175 */
    691
    692		rotation-matrix = "-1", "0", "0",
    693				  "0", "1", "0",
    694				  "0", "0", "-1";
    695
    696	};
    697};
    698
    699&mcbsp2 {
    700	#sound-dai-cells = <0>;
    701	pinctrl-names = "default";
    702	pinctrl-0 = <&mcbsp2_pins>;
    703	status = "okay";
    704
    705	mcbsp2_port: port {
    706		cpu_dai2: endpoint {
    707			dai-format = "i2s";
    708			remote-endpoint = <&cpcap_audio_codec0>;
    709			frame-master = <&cpcap_audio_codec0>;
    710			bitclock-master = <&cpcap_audio_codec0>;
    711		};
    712	};
    713};
    714
    715&mcbsp3 {
    716	#sound-dai-cells = <0>;
    717	pinctrl-names = "default";
    718	pinctrl-0 = <&mcbsp3_pins>;
    719	status = "okay";
    720
    721	mcbsp3_port: port {
    722		cpu_dai3: endpoint {
    723			dai-format = "dsp_a";
    724			frame-master = <&cpcap_audio_codec1>;
    725			bitclock-master = <&cpcap_audio_codec1>;
    726			remote-endpoint = <&cpcap_audio_codec1>;
    727		};
    728	};
    729};
    730
    731&cpcap_audio_codec0 {
    732	remote-endpoint = <&cpu_dai2>;
    733};
    734
    735&cpcap_audio_codec1 {
    736	remote-endpoint = <&cpu_dai3>;
    737};