cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mstar-infinity3.dtsi (1329B)


      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * Copyright (c) 2020 thingy.jp.
      4 * Author: Daniel Palmer <daniel@thingy.jp>
      5 */
      6
      7#include "mstar-infinity.dtsi"
      8
      9&cpu0_opp_table {
     10	opp-1008000000 {
     11		opp-hz = /bits/ 64 <1008000000>;
     12		opp-microvolt = <1000000>;
     13		clock-latency-ns = <300000>;
     14	};
     15
     16	// overclock frequencies below, shown to work fine up to 1.3 GHz
     17	opp-108000000 {
     18		opp-hz = /bits/ 64 <1080000000>;
     19		opp-microvolt = <1000000>;
     20		clock-latency-ns = <300000>;
     21		turbo-mode;
     22	};
     23
     24	opp-1188000000 {
     25		opp-hz = /bits/ 64 <1188000000>;
     26		opp-microvolt = <1000000>;
     27		clock-latency-ns = <300000>;
     28		turbo-mode;
     29	};
     30
     31	opp-1296000000 {
     32		opp-hz = /bits/ 64 <1296000000>;
     33		opp-microvolt = <1000000>;
     34		clock-latency-ns = <300000>;
     35		turbo-mode;
     36	};
     37
     38	opp-1350000000 {
     39		opp-hz = /bits/ 64 <1350000000>;
     40		opp-microvolt = <1000000>;
     41		clock-latency-ns = <300000>;
     42		turbo-mode;
     43	};
     44
     45	opp-1404000000 {
     46		opp-hz = /bits/ 64 <1404000000>;
     47		opp-microvolt = <1000000>;
     48		clock-latency-ns = <300000>;
     49		turbo-mode;
     50	};
     51
     52	opp-1458000000 {
     53		opp-hz = /bits/ 64 <1458000000>;
     54		opp-microvolt = <1000000>;
     55		clock-latency-ns = <300000>;
     56		turbo-mode;
     57	};
     58
     59	opp-1512000000 {
     60		opp-hz = /bits/ 64 <1512000000>;
     61		opp-microvolt = <1000000>;
     62		clock-latency-ns = <300000>;
     63		turbo-mode;
     64	};
     65};
     66
     67&imi {
     68	reg = <0xa0000000 0x20000>;
     69};