nuvoton-npcm730-gbs.dts (20753B)
1// SPDX-License-Identifier: GPL-2.0 2// Copyright (c) 2020 Quanta Computer Inc. George.Hung@quantatw.com 3 4/dts-v1/; 5#include "nuvoton-npcm730.dtsi" 6#include <dt-bindings/gpio/gpio.h> 7 8/ { 9 model = "Quanta GBS Board (Device Tree)"; 10 compatible = "quanta,gbs-bmc","nuvoton,npcm730"; 11 12 aliases { 13 ethernet1 = &gmac0; 14 serial0 = &serial0; 15 serial1 = &serial1; 16 serial2 = &serial2; 17 serial3 = &serial3; 18 i2c0 = &i2c0; 19 i2c1 = &i2c1; 20 i2c2 = &i2c2; 21 i2c3 = &i2c3; 22 i2c4 = &i2c4; 23 i2c5 = &i2c5; 24 i2c6 = &i2c6; 25 i2c7 = &i2c7; 26 i2c8 = &i2c8; 27 i2c9 = &i2c9; 28 i2c10 = &i2c10; 29 i2c11 = &i2c11; 30 i2c12 = &i2c12; 31 i2c13 = &i2c13; 32 i2c14 = &i2c14; 33 i2c15 = &i2c15; 34 i2c16 = &i2c0_slotPE0_0; 35 i2c17 = &i2c0_slotPE1_1; 36 i2c18 = &i2c0_slotUSB_2; 37 i2c19 = &i2c0_3; 38 i2c20 = &i2c5_i2cool_0; 39 i2c21 = &i2c5_i2cool_1; 40 i2c22 = &i2c5_i2cool_2; 41 i2c23 = &i2c5_hsbp_fru_3; 42 i2c24 = &i2c6_u2_15_0; 43 i2c25 = &i2c6_u2_14_1; 44 i2c26 = &i2c6_u2_13_2; 45 i2c27 = &i2c6_u2_12_3; 46 i2c28 = &i2c7_u2_11_0; 47 i2c29 = &i2c7_u2_10_1; 48 i2c30 = &i2c7_u2_9_2; 49 i2c31 = &i2c7_u2_8_3; 50 i2c32 = &i2c9_vddcr_cpu; 51 i2c33 = &i2c9_vddcr_soc; 52 i2c34 = &i2c9_vddio_efgh; 53 i2c35 = &i2c9_vddio_abcd; 54 i2c36 = &i2c10_u2_7_0; 55 i2c37 = &i2c10_u2_6_1; 56 i2c38 = &i2c10_u2_5_2; 57 i2c39 = &i2c10_u2_4_3; 58 i2c40 = &i2c11_clk_buf0_0; 59 i2c41 = &i2c11_clk_buf1_1; 60 i2c42 = &i2c11_clk_buf2_2; 61 i2c43 = &i2c11_clk_buf3_3; 62 i2c44 = &i2c14_u2_3_0; 63 i2c45 = &i2c14_u2_2_1; 64 i2c46 = &i2c14_u2_1_2; 65 i2c47 = &i2c14_u2_0_3; 66 fiu0 = &fiu0; 67 fiu1 = &fiu3; 68 }; 69 70 chosen { 71 stdout-path = &serial0; 72 }; 73 74 memory { 75 reg = <0 0x40000000>; 76 }; 77 78 gpio-keys { 79 compatible = "gpio-keys"; 80 sas-cable0 { 81 label = "sas-cable0"; 82 gpios = <&gpio2 9 GPIO_ACTIVE_LOW>; 83 linux,code = <73>; 84 }; 85 86 sas-cable1 { 87 label = "sas-cable1"; 88 gpios = <&gpio2 8 GPIO_ACTIVE_LOW>; 89 linux,code = <72>; 90 }; 91 92 sas-cable2 { 93 label = "sas-cable2"; 94 gpios = <&gpio2 7 GPIO_ACTIVE_LOW>; 95 linux,code = <71>; 96 }; 97 98 sas-cable3 { 99 label = "sas-cable3"; 100 gpios = <&gpio2 6 GPIO_ACTIVE_LOW>; 101 linux,code = <70>; 102 }; 103 104 sata0 { 105 label = "sata0"; 106 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; 107 linux,code = <5>; 108 }; 109 110 hsbp-cable { 111 label = "hsbp-cable"; 112 gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; 113 linux,code = <57>; 114 }; 115 116 fanbd-cable { 117 label = "fanbd-cable"; 118 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; 119 linux,code = <58>; 120 }; 121 122 bp12v-cable { 123 label = "bp12v-cable"; 124 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; 125 linux,code = <69>; 126 }; 127 128 pe-slot0 { 129 label = "pe-slot0"; 130 gpios = <&gpio3 24 GPIO_ACTIVE_LOW>; 131 linux,code = <120>; 132 }; 133 134 pe-slot1 { 135 label = "pe-slot1"; 136 gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; 137 linux,code = <121>; 138 }; 139 }; 140 141 iio-hwmon { 142 compatible = "iio-hwmon"; 143 io-channels = <&adc 1>, <&adc 2>; 144 }; 145 146 iio-hwmon-battery { 147 compatible = "iio-hwmon"; 148 io-channels = <&adc 0>; 149 }; 150 151 leds { 152 compatible = "gpio-leds"; 153 154 heartbeat { /* gpio153 */ 155 gpios = <&gpio4 25 GPIO_ACTIVE_LOW>; 156 linux,default-trigger = "heartbeat"; 157 }; 158 159 attention { /* gpio215 */ 160 gpios = <&gpio6 23 GPIO_ACTIVE_HIGH>; 161 default-state = "off"; 162 }; 163 164 sys_boot_status { /* gpio216 */ 165 gpios = <&gpio6 24 GPIO_ACTIVE_HIGH>; 166 default-state = "keep"; 167 retain-state-shutdown; 168 }; 169 170 bmc_fault { /* gpio217 */ 171 gpios = <&gpio6 25 GPIO_ACTIVE_HIGH>; 172 default-state = "off"; 173 linux,default-trigger = "panic"; 174 panic-indicator; 175 }; 176 177 led_u2_0_locate { 178 gpios = <&pca9535_ledlocate 3 GPIO_ACTIVE_LOW>; 179 default-state = "off"; 180 }; 181 182 led_u2_1_locate { 183 gpios = <&pca9535_ledlocate 2 GPIO_ACTIVE_LOW>; 184 default-state = "off"; 185 }; 186 187 led_u2_2_locate { 188 gpios = <&pca9535_ledlocate 1 GPIO_ACTIVE_LOW>; 189 default-state = "off"; 190 }; 191 192 led_u2_3_locate { 193 gpios = <&pca9535_ledlocate 0 GPIO_ACTIVE_LOW>; 194 default-state = "off"; 195 }; 196 197 led_u2_4_locate { 198 gpios = <&pca9535_ledlocate 7 GPIO_ACTIVE_LOW>; 199 default-state = "off"; 200 }; 201 202 led_u2_5_locate { 203 gpios = <&pca9535_ledlocate 6 GPIO_ACTIVE_LOW>; 204 default-state = "off"; 205 }; 206 207 led_u2_6_locate { 208 gpios = <&pca9535_ledlocate 5 GPIO_ACTIVE_LOW>; 209 default-state = "off"; 210 }; 211 212 led_u2_7_locate { 213 gpios = <&pca9535_ledlocate 4 GPIO_ACTIVE_LOW>; 214 default-state = "off"; 215 }; 216 217 led_u2_8_locate { 218 gpios = <&pca9535_ledlocate 11 GPIO_ACTIVE_LOW>; 219 default-state = "off"; 220 }; 221 222 led_u2_9_locate { 223 gpios = <&pca9535_ledlocate 10 GPIO_ACTIVE_LOW>; 224 default-state = "off"; 225 }; 226 227 led_u2_10_locate { 228 gpios = <&pca9535_ledlocate 9 GPIO_ACTIVE_LOW>; 229 default-state = "off"; 230 }; 231 232 led_u2_11_locate { 233 gpios = <&pca9535_ledlocate 8 GPIO_ACTIVE_LOW>; 234 default-state = "off"; 235 }; 236 237 led_u2_12_locate { 238 gpios = <&pca9535_ledlocate 15 GPIO_ACTIVE_LOW>; 239 default-state = "off"; 240 }; 241 242 led_u2_13_locate { 243 gpios = <&pca9535_ledlocate 14 GPIO_ACTIVE_LOW>; 244 default-state = "off"; 245 }; 246 247 led_u2_14_locate { 248 gpios = <&pca9535_ledlocate 13 GPIO_ACTIVE_LOW>; 249 default-state = "off"; 250 }; 251 252 led_u2_15_locate { 253 gpios = <&pca9535_ledlocate 12 GPIO_ACTIVE_LOW>; 254 default-state = "off"; 255 }; 256 257 led_u2_0_fault { 258 gpios = <&pca9535_ledfault 3 GPIO_ACTIVE_LOW>; 259 default-state = "off"; 260 }; 261 262 led_u2_1_fault { 263 gpios = <&pca9535_ledfault 2 GPIO_ACTIVE_LOW>; 264 default-state = "off"; 265 }; 266 267 led_u2_2_fault { 268 gpios = <&pca9535_ledfault 1 GPIO_ACTIVE_LOW>; 269 default-state = "off"; 270 }; 271 272 led_u2_3_fault { 273 gpios = <&pca9535_ledfault 0 GPIO_ACTIVE_LOW>; 274 default-state = "off"; 275 }; 276 277 led_u2_4_fault { 278 gpios = <&pca9535_ledfault 7 GPIO_ACTIVE_LOW>; 279 default-state = "off"; 280 }; 281 282 led_u2_5_fault { 283 gpios = <&pca9535_ledfault 6 GPIO_ACTIVE_LOW>; 284 default-state = "off"; 285 }; 286 287 led_u2_6_fault { 288 gpios = <&pca9535_ledfault 5 GPIO_ACTIVE_LOW>; 289 default-state = "off"; 290 }; 291 292 led_u2_7_fault { 293 gpios = <&pca9535_ledfault 4 GPIO_ACTIVE_LOW>; 294 default-state = "off"; 295 }; 296 297 led_u2_8_fault { 298 gpios = <&pca9535_ledfault 11 GPIO_ACTIVE_LOW>; 299 default-state = "off"; 300 }; 301 302 led_u2_9_fault { 303 gpios = <&pca9535_ledfault 10 GPIO_ACTIVE_LOW>; 304 default-state = "off"; 305 }; 306 307 led_u2_10_fault { 308 gpios = <&pca9535_ledfault 9 GPIO_ACTIVE_LOW>; 309 default-state = "off"; 310 }; 311 312 led_u2_11_fault { 313 gpios = <&pca9535_ledfault 8 GPIO_ACTIVE_LOW>; 314 default-state = "off"; 315 }; 316 317 led_u2_12_fault { 318 gpios = <&pca9535_ledfault 15 GPIO_ACTIVE_LOW>; 319 default-state = "off"; 320 }; 321 322 led_u2_13_fault { 323 gpios = <&pca9535_ledfault 14 GPIO_ACTIVE_LOW>; 324 default-state = "off"; 325 }; 326 327 led_u2_14_fault { 328 gpios = <&pca9535_ledfault 13 GPIO_ACTIVE_LOW>; 329 default-state = "off"; 330 }; 331 332 led_u2_15_fault { 333 gpios = <&pca9535_ledfault 12 GPIO_ACTIVE_LOW>; 334 default-state = "off"; 335 }; 336 337 }; 338 339 seven-seg-disp { 340 compatible = "seven-seg-gpio-dev"; 341 refresh-interval-ms = /bits/ 16 <600>; 342 clock-gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; 343 data-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>; 344 clear-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>; 345 }; 346 347 pcie-slot { 348 pcie1: pcie-slot@1 { 349 label = "PE0"; 350 }; 351 pcie2: pcie-slot@2 { 352 label = "PE1"; 353 }; 354 }; 355}; 356 357&fiu0 { 358 pinctrl-names = "default"; 359 pinctrl-0 = <&spi0cs1_pins>; 360 status = "okay"; 361 flash@0 { 362 compatible = "jedec,spi-nor"; 363 #address-cells = <1>; 364 #size-cells = <1>; 365 reg = <0>; 366 spi-max-frequency = <20000000>; 367 spi-rx-bus-width = <2>; 368 label = "bmc"; 369 partitions@80000000 { 370 compatible = "fixed-partitions"; 371 #address-cells = <1>; 372 #size-cells = <1>; 373 u-boot@0 { 374 label = "u-boot"; 375 reg = <0x0000000 0xf0000>; 376 }; 377 image-descriptor@f0000 { 378 label = "image-descriptor"; 379 reg = <0xf0000 0x10000>; 380 }; 381 hoth-update@100000 { 382 label = "hoth-update"; 383 reg = <0x100000 0x100000>; 384 }; 385 kernel@200000 { 386 label = "kernel"; 387 reg = <0x200000 0x500000>; 388 }; 389 rofs@700000 { 390 label = "rofs"; 391 reg = <0x700000 0x35f0000>; 392 }; 393 rwfs@3cf0000 { 394 label = "rwfs"; 395 reg = <0x3cf0000 0x300000>; 396 }; 397 hoth-mailbox@3ff0000 { 398 label = "hoth-mailbox"; 399 reg = <0x3ff0000 0x10000>; 400 }; 401 }; 402 }; 403}; 404 405&fiu3 { 406 pinctrl-0 = <&spi3_pins>, <&spi3cs1_pins>; 407 status = "okay"; 408 409 flash@0 { 410 compatible = "jedec,spi-nor"; 411 #address-cells = <1>; 412 #size-cells = <1>; 413 reg = <0>; 414 spi-max-frequency = <50000000>; 415 spi-rx-bus-width = <2>; 416 m25p,fast-read; 417 label = "pnor"; 418 }; 419 flash@1 { 420 compatible = "jedec,spi-nor"; 421 #address-cells = <1>; 422 #size-cells = <1>; 423 reg = <1>; 424 spi-max-frequency = <50000000>; 425 spi-rx-bus-width = <2>; 426 m25p,fast-read; 427 }; 428}; 429 430&gcr { 431 serial_port_mux: uart-mux-controller { 432 compatible = "mmio-mux"; 433 #mux-control-cells = <1>; 434 mux-reg-masks = <0x38 0x07>; 435 idle-states = <2>; /* Serial port mode 3 (takeover) */ 436 }; 437 438 uart1_mode_mux: uart1-mode-mux-controller { 439 compatible = "mmio-mux"; 440 #mux-control-cells = <1>; 441 mux-reg-masks = <0x64 0x01000000>; 442 idle-states = <0>; /* Set UART1 mode to normal (follow SPMOD) */ 443 }; 444}; 445 446&gmac0 { 447 status = "okay"; 448 phy-mode = "rgmii-id"; 449 snps,eee-force-disable; 450}; 451 452&ehci1 { 453 status = "okay"; 454}; 455 456&watchdog1 { 457 status = "okay"; 458}; 459 460&rng { 461 status = "okay"; 462}; 463 464&serial0 { 465 status = "okay"; 466}; 467 468&serial1 { 469 status = "okay"; 470}; 471 472&serial2 { 473 status = "okay"; 474}; 475 476&serial3 { 477 status = "okay"; 478}; 479 480&adc { 481 #io-channel-cells = <1>; 482 status = "okay"; 483}; 484 485&lpc_kcs { 486 kcs1: kcs1@0 { 487 status = "okay"; 488 }; 489 490 kcs2: kcs2@0 { 491 status = "okay"; 492 }; 493 494 kcs3: kcs3@0 { 495 status = "okay"; 496 }; 497}; 498 499&spi1 { 500 cs-gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>; /* dummy - gpio147 */ 501 pinctrl-names = "default"; 502 pinctrl-0 = <&gpio224ol_pins &gpio227o_pins 503 &gpio228_pins>; 504 status = "okay"; 505 506 jtag_master@0 { 507 compatible = "nuvoton,npcm750-jtag-master"; 508 spi-max-frequency = <25000000>; 509 reg = <0>; 510 status = "okay"; 511 512 pinctrl-names = "pspi", "gpio"; 513 pinctrl-0 = <&pspi2_pins>; 514 pinctrl-1 = <&gpio224ol_pins &gpio227o_pins 515 &gpio228_pins>; 516 517 tck-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; 518 tdi-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>; 519 tdo-gpios = <&gpio7 4 GPIO_ACTIVE_HIGH>; 520 tms-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>; 521 }; 522}; 523 524&i2c0 { 525 clock-frequency = <100000>; 526 status = "okay"; 527 528 i2c-switch@71 { 529 compatible = "nxp,pca9546"; 530 #address-cells = <1>; 531 #size-cells = <0>; 532 reg = <0x71>; 533 i2c-mux-idle-disconnect; 534 reset-gpios = <&gpio2 20 GPIO_ACTIVE_LOW>; 535 536 i2c0_slotPE0_0: i2c@0 { 537 #address-cells = <1>; 538 #size-cells = <0>; 539 reg = <0>; 540 pcie-slot = &pcie1; 541 }; 542 543 i2c0_slotPE1_1: i2c@1 { 544 #address-cells = <1>; 545 #size-cells = <0>; 546 reg = <1>; 547 pcie-slot = &pcie2; 548 }; 549 550 i2c0_slotUSB_2: i2c@2 { 551 #address-cells = <1>; 552 #size-cells = <0>; 553 reg = <2>; 554 }; 555 556 i2c0_3: i2c@3 { 557 #address-cells = <1>; 558 #size-cells = <0>; 559 reg = <3>; 560 }; 561 }; 562}; 563 564&i2c1 { 565 clock-frequency = <100000>; 566 status = "okay"; 567 568 pca9535_ifdet: pca9535-ifdet@24 { 569 compatible = "nxp,pca9535"; 570 reg = <0x24>; 571 gpio-controller; 572 #gpio-cells = <2>; 573 }; 574 575 pca9535_pwren: pca9535-pwren@20 { 576 compatible = "nxp,pca9535"; 577 reg = <0x20>; 578 gpio-controller; 579 #gpio-cells = <2>; 580 581 gpio-line-names = 582 "pwr_u2_3_en","pwr_u2_2_en", 583 "pwr_u2_1_en","pwr_u2_0_en", 584 "pwr_u2_7_en","pwr_u2_6_en", 585 "pwr_u2_5_en","pwr_u2_4_en", 586 "pwr_u2_11_en","pwr_u2_10_en", 587 "pwr_u2_9_en","pwr_u2_8_en", 588 "pwr_u2_15_en","pwr_u2_14_en", 589 "pwr_u2_13_en","pwr_u2_12_en"; 590 }; 591 592 pca9535_pwrgd: pca9535-pwrgd@21 { 593 compatible = "nxp,pca9535"; 594 reg = <0x21>; 595 gpio-controller; 596 #gpio-cells = <2>; 597 }; 598 599 pca9535_ledlocate: pca9535-ledlocate@22 { 600 compatible = "nxp,pca9535"; 601 reg = <0x22>; 602 gpio-controller; 603 #gpio-cells = <2>; 604 605 }; 606 607 pca9535_ledfault: pca9535-ledfault@23 { 608 compatible = "nxp,pca9535"; 609 reg = <0x23>; 610 gpio-controller; 611 #gpio-cells = <2>; 612 613 }; 614 615 pca9535_pwrdisable: pca9535-pwrdisable@25 { 616 compatible = "nxp,pca9535"; 617 reg = <0x25>; 618 gpio-controller; 619 #gpio-cells = <2>; 620 621 gpio-line-names = 622 "u2_3_pwr_dis","u2_2_pwr_dis", 623 "u2_1_pwr_dis","u2_0_pwr_dis", 624 "u2_7_pwr_dis","u2_6_pwr_dis", 625 "u2_5_pwr_dis","u2_4_pwr_dis", 626 "u2_11_pwr_dis","u2_10_pwr_dis", 627 "u2_9_pwr_dis","u2_8_pwr_dis", 628 "u2_15_pwr_dis","u2_14_pwr_dis", 629 "u2_13_pwr_dis","u2_12_pwr_dis"; 630 }; 631 632 pca9535_perst: pca9535-perst@26 { 633 compatible = "nxp,pca9535"; 634 reg = <0x26>; 635 gpio-controller; 636 #gpio-cells = <2>; 637 638 gpio-line-names = 639 "u2_15_perst","u2_14_perst", 640 "u2_13_perst","u2_12_perst", 641 "u2_11_perst","u2_10_perst", 642 "u2_9_perst","u2_8_perst", 643 "u2_7_perst","u2_6_perst", 644 "u2_5_perst","u2_4_perst", 645 "u2_3_perst","u2_2_perst", 646 "u2_1_perst","u2_0_perst"; 647 }; 648}; 649 650&i2c2 { 651 clock-frequency = <100000>; 652 status = "okay"; 653 654 sbtsi@4c { 655 compatible = "amd,sbtsi"; 656 reg = <0x4c>; 657 }; 658}; 659 660&i2c5 { 661 clock-frequency = <100000>; 662 status = "okay"; 663 664 mb_fru@50 { 665 compatible = "atmel,24c64"; 666 reg = <0x50>; 667 }; 668 669 i2c-switch@71 { 670 compatible = "nxp,pca9546"; 671 #address-cells = <1>; 672 #size-cells = <0>; 673 reg = <0x71>; 674 i2c-mux-idle-disconnect; 675 676 i2c5_i2cool_0: i2c@0 { 677 #address-cells = <1>; 678 #size-cells = <0>; 679 reg = <0>; 680 max31725@54 { 681 compatible = "maxim,max31725"; 682 reg = <0x54>; 683 status = "okay"; 684 }; 685 }; 686 687 i2c5_i2cool_1: i2c@1 { 688 #address-cells = <1>; 689 #size-cells = <0>; 690 reg = <1>; 691 max31725@55 { 692 compatible = "maxim,max31725"; 693 reg = <0x55>; 694 status = "okay"; 695 }; 696 }; 697 698 i2c5_i2cool_2: i2c@2 { 699 #address-cells = <1>; 700 #size-cells = <0>; 701 reg = <2>; 702 max31725@5d { 703 compatible = "maxim,max31725"; 704 reg = <0x5d>; 705 status = "okay"; 706 }; 707 fan_fru@51 { 708 compatible = "atmel,24c64"; 709 reg = <0x51>; 710 }; 711 }; 712 713 i2c5_hsbp_fru_3: i2c@3 { 714 #address-cells = <1>; 715 #size-cells = <0>; 716 reg = <3>; 717 hsbp_fru@52 { 718 compatible = "atmel,24c64"; 719 reg = <0x52>; 720 status = "okay"; 721 }; 722 }; 723 }; 724}; 725 726&i2c6 { 727 clock-frequency = <100000>; 728 status = "okay"; 729 730 i2c-switch@73 { 731 compatible = "nxp,pca9545"; 732 #address-cells = <1>; 733 #size-cells = <0>; 734 reg = <0x73>; 735 i2c-mux-idle-disconnect; 736 737 i2c6_u2_15_0: i2c@0 { 738 #address-cells = <1>; 739 #size-cells = <0>; 740 reg = <0>; 741 }; 742 743 i2c6_u2_14_1: i2c@1 { 744 #address-cells = <1>; 745 #size-cells = <0>; 746 reg = <1>; 747 }; 748 i2c6_u2_13_2: i2c@2 { 749 #address-cells = <1>; 750 #size-cells = <0>; 751 reg = <2>; 752 }; 753 754 i2c6_u2_12_3: i2c@3 { 755 #address-cells = <1>; 756 #size-cells = <0>; 757 reg = <3>; 758 }; 759 }; 760}; 761 762&i2c7 { 763 clock-frequency = <100000>; 764 status = "okay"; 765 766 i2c-switch@72 { 767 compatible = "nxp,pca9545"; 768 #address-cells = <1>; 769 #size-cells = <0>; 770 reg = <0x72>; 771 i2c-mux-idle-disconnect; 772 773 i2c7_u2_11_0: i2c@0 { 774 #address-cells = <1>; 775 #size-cells = <0>; 776 reg = <0>; 777 }; 778 779 i2c7_u2_10_1: i2c@1 { 780 #address-cells = <1>; 781 #size-cells = <0>; 782 reg = <1>; 783 }; 784 i2c7_u2_9_2: i2c@2 { 785 #address-cells = <1>; 786 #size-cells = <0>; 787 reg = <2>; 788 }; 789 790 i2c7_u2_8_3: i2c@3 { 791 #address-cells = <1>; 792 #size-cells = <0>; 793 reg = <3>; 794 }; 795 }; 796}; 797 798&i2c8 { 799 clock-frequency = <100000>; 800 status = "okay"; 801 802 i2c8_adm1272: adm1272@10 { 803 compatible = "adi,adm1272"; 804 #address-cells = <1>; 805 #size-cells = <0>; 806 reg = <0x10>; 807 shunt-resistor-micro-ohms = <300>; 808 }; 809}; 810 811&i2c9 { 812 clock-frequency = <100000>; 813 status = "okay"; 814 815 i2c-switch@71 { 816 compatible = "nxp,pca9546"; 817 #address-cells = <1>; 818 #size-cells = <0>; 819 reg = <0x71>; 820 i2c-mux-idle-disconnect; 821 reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; 822 823 i2c9_vddcr_cpu: i2c@0 { 824 #address-cells = <1>; 825 #size-cells = <0>; 826 reg = <0>; 827 vrm@60 { 828 compatible = "isil,isl68137"; 829 reg = <0x60>; 830 }; 831 }; 832 833 i2c9_vddcr_soc: i2c@1 { 834 #address-cells = <1>; 835 #size-cells = <0>; 836 reg = <1>; 837 vrm@61 { 838 compatible = "isil,isl68137"; 839 reg = <0x61>; 840 }; 841 }; 842 843 i2c9_vddio_efgh: i2c@2 { 844 #address-cells = <1>; 845 #size-cells = <0>; 846 reg = <2>; 847 vrm@63 { 848 compatible = "isil,isl68137"; 849 reg = <0x63>; 850 }; 851 }; 852 853 i2c9_vddio_abcd: i2c@3 { 854 #address-cells = <1>; 855 #size-cells = <0>; 856 reg = <3>; 857 vrm@45 { 858 compatible = "isil,isl68137"; 859 reg = <0x45>; 860 }; 861 }; 862 }; 863}; 864 865&i2c10 { 866 clock-frequency = <100000>; 867 status = "okay"; 868 869 i2c-switch@71 { 870 compatible = "nxp,pca9545"; 871 #address-cells = <1>; 872 #size-cells = <0>; 873 reg = <0x71>; 874 i2c-mux-idle-disconnect; 875 876 i2c10_u2_7_0: i2c@0 { 877 #address-cells = <1>; 878 #size-cells = <0>; 879 reg = <0>; 880 }; 881 882 i2c10_u2_6_1: i2c@1 { 883 #address-cells = <1>; 884 #size-cells = <0>; 885 reg = <1>; 886 }; 887 i2c10_u2_5_2: i2c@2 { 888 #address-cells = <1>; 889 #size-cells = <0>; 890 reg = <2>; 891 }; 892 893 i2c10_u2_4_3: i2c@3 { 894 #address-cells = <1>; 895 #size-cells = <0>; 896 reg = <3>; 897 }; 898 }; 899}; 900 901&i2c11 { 902 clock-frequency = <100000>; 903 status = "okay"; 904 905 i2c-switch@76 { 906 compatible = "nxp,pca9545"; 907 #address-cells = <1>; 908 #size-cells = <0>; 909 reg = <0x76>; 910 i2c-mux-idle-disconnect; 911 912 i2c11_clk_buf0_0: i2c@0 { 913 #address-cells = <1>; 914 #size-cells = <0>; 915 reg = <0>; 916 }; 917 918 i2c11_clk_buf1_1: i2c@1 { 919 #address-cells = <1>; 920 #size-cells = <0>; 921 reg = <1>; 922 }; 923 i2c11_clk_buf2_2: i2c@2 { 924 #address-cells = <1>; 925 #size-cells = <0>; 926 reg = <2>; 927 }; 928 929 i2c11_clk_buf3_3: i2c@3 { 930 #address-cells = <1>; 931 #size-cells = <0>; 932 reg = <3>; 933 }; 934 }; 935}; 936 937&i2c12 { 938 clock-frequency = <100000>; 939 status = "okay"; 940 941 max34451@4e { 942 compatible = "maxim,max34451"; 943 reg = <0x4e>; 944 }; 945 vrm@5d { 946 compatible = "isil,isl68137"; 947 reg = <0x5d>; 948 }; 949 vrm@5e { 950 compatible = "isil,isl68137"; 951 reg = <0x5e>; 952 }; 953}; 954 955&i2c13 { 956 clock-frequency = <100000>; 957 status = "okay"; 958}; 959 960&i2c14 { 961 clock-frequency = <100000>; 962 status = "okay"; 963 964 i2c-switch@70 { 965 compatible = "nxp,pca9545"; 966 #address-cells = <1>; 967 #size-cells = <0>; 968 reg = <0x70>; 969 i2c-mux-idle-disconnect; 970 971 i2c14_u2_3_0: i2c@0 { 972 #address-cells = <1>; 973 #size-cells = <0>; 974 reg = <0>; 975 }; 976 977 i2c14_u2_2_1: i2c@1 { 978 #address-cells = <1>; 979 #size-cells = <0>; 980 reg = <1>; 981 }; 982 983 i2c14_u2_1_2: i2c@2 { 984 #address-cells = <1>; 985 #size-cells = <0>; 986 reg = <2>; 987 }; 988 989 i2c14_u2_0_3: i2c@3 { 990 #address-cells = <1>; 991 #size-cells = <0>; 992 reg = <3>; 993 }; 994 }; 995}; 996 997&pwm_fan { 998 pinctrl-names = "default"; 999 pinctrl-0 = < 1000 &pwm0_pins &pwm1_pins 1001 &pwm2_pins &pwm3_pins 1002 &pwm4_pins 1003 &fanin0_pins &fanin1_pins 1004 &fanin2_pins &fanin3_pins 1005 &fanin4_pins 1006 >; 1007 status = "okay"; 1008 1009 fan@0 { 1010 reg = <0x00>; 1011 fan-tach-ch = /bits/ 8 <0x00>; 1012 }; 1013 fan@1 { 1014 reg = <0x01>; 1015 fan-tach-ch = /bits/ 8 <0x01>; 1016 }; 1017 fan@2 { 1018 reg = <0x02>; 1019 fan-tach-ch = /bits/ 8 <0x02>; 1020 }; 1021 fan@3 { 1022 reg = <0x04>; 1023 fan-tach-ch = /bits/ 8 <0x04>; 1024 }; 1025 fan@4 { 1026 reg = <0x03>; 1027 fan-tach-ch = /bits/ 8 <0x03>; 1028 }; 1029}; 1030 1031&pinctrl { 1032 pinctrl-names = "default"; 1033 1034 gpio0: gpio@f0010000 { 1035 /* POWER_OUT=gpio07, RESET_OUT=gpio06, PS_PWROK=gpio13 */ 1036 gpio-line-names = 1037 /*0-31*/ 1038 "","","","","","","RESET_OUT","POWER_OUT", 1039 "","","","","","PS_PWROK","","", 1040 "","","","","","","","", 1041 "","","","","","","",""; 1042 }; 1043 gpio1: gpio@f0011000 { 1044 /* SIO_POWER_GOOD=gpio59 */ 1045 gpio-line-names = 1046 /*32-63*/ 1047 "","","","","","","","", 1048 "","","","","","","","", 1049 "","","","","","","","", 1050 "","","","SIO_POWER_GOOD","","","",""; 1051 }; 1052 gpio2: gpio@f0012000 { 1053 bmc_usb_mux_oe_n { 1054 gpio-hog; 1055 gpios = <25 GPIO_ACTIVE_HIGH>; 1056 output-low; 1057 line-name = "bmc-usb-mux-oe-n"; 1058 }; 1059 bmc_usb_mux_sel { 1060 gpio-hog; 1061 gpios = <26 GPIO_ACTIVE_HIGH>; 1062 output-low; 1063 line-name = "bmc-usb-mux-sel"; 1064 }; 1065 bmc_usb2517_reset_n { 1066 gpio-hog; 1067 gpios = <27 GPIO_ACTIVE_LOW>; 1068 output-low; 1069 line-name = "bmc-usb2517-reset-n"; 1070 }; 1071 }; 1072 gpio3: gpio@f0013000 { 1073 assert_cpu0_reset { 1074 gpio-hog; 1075 gpios = <14 GPIO_ACTIVE_HIGH>; 1076 output-low; 1077 line-name = "assert-cpu0-reset"; 1078 }; 1079 assert_pwrok_cpu0_n { 1080 gpio-hog; 1081 gpios = <15 GPIO_ACTIVE_HIGH>; 1082 output-low; 1083 line-name = "assert-pwrok-cpu0-n"; 1084 }; 1085 assert_cpu0_prochot { 1086 gpio-hog; 1087 gpios = <16 GPIO_ACTIVE_HIGH>; 1088 output-low; 1089 line-name = "assert-cpu0-prochot"; 1090 }; 1091 }; 1092 gpio4: gpio@f0014000 { 1093 /* POST_COMPLETE=gpio143 */ 1094 gpio-line-names = 1095 /*128-159*/ 1096 "","","","","","","","", 1097 "","","","","","","","POST_COMPLETE", 1098 "","","","","","","","", 1099 "","","","","","","",""; 1100 }; 1101 gpio5: gpio@f0015000 { 1102 /* POWER_BUTTON=gpio177 */ 1103 gpio-line-names = 1104 /*160-191*/ 1105 "","","","","","","","", 1106 "","","","","","","","", 1107 "","POWER_BUTTON","","","","","","", 1108 "","","","","","","",""; 1109 }; 1110 gpio6: gpio@f0016000 { 1111 /* SIO_S5=gpio199, RESET_BUTTON=gpio203 */ 1112 gpio-line-names = 1113 /*192-223*/ 1114 "","","","","","","","SIO_S5", 1115 "","","","RESET_BUTTON","","","","", 1116 "","","","","","","","", 1117 "","","","","","","",""; 1118 }; 1119 1120 gpio224ol_pins: gpio224ol-pins { 1121 pins = "GPIO224/SPIXCK"; 1122 bias-disable; 1123 output-low; 1124 }; 1125 gpio227o_pins: gpio227o-pins { 1126 pins = "GPIO227/nSPIXCS0"; 1127 bias-disable; 1128 output-high; 1129 }; 1130 gpio228_pins: gpio228-pins { 1131 pins = "GPIO228/nSPIXCS1"; 1132 bias-disable; 1133 input-enable; 1134 }; 1135};