cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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nuvoton-wpcm450-supermicro-x9sci-ln4f.dts (1485B)


      1// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
      2// Copyright 2021 Jonathan Neuschäfer
      3
      4/dts-v1/;
      5
      6/* The last 16 MiB are dedicated to the GPU */
      7/memreserve/ 0x07000000 0x01000000;
      8
      9#include "nuvoton-wpcm450.dtsi"
     10
     11#include <dt-bindings/input/linux-event-codes.h>
     12#include <dt-bindings/gpio/gpio.h>
     13
     14/ {
     15	model = "Supermicro X9SCi-LN4F BMC";
     16	compatible = "supermicro,x9sci-ln4f-bmc", "nuvoton,wpcm450";
     17
     18	chosen {
     19		stdout-path = "serial0:115200n8";
     20	};
     21
     22	memory@0 {
     23		device_type = "memory";
     24		reg = <0 0x08000000>; /* 128 MiB */
     25	};
     26
     27	gpio-keys {
     28		compatible = "gpio-keys";
     29		pinctrl-names = "default";
     30		pinctrl-0 = <&key_pins>;
     31
     32		uid {
     33			label = "UID button";
     34			linux,code = <KEY_HOME>;
     35			gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
     36		};
     37	};
     38
     39	gpio-leds {
     40		compatible = "gpio-leds";
     41		pinctrl-names = "default";
     42		pinctrl-0 = <&led_pins>;
     43
     44		uid {
     45			label = "UID";
     46			gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
     47		};
     48
     49		heartbeat {
     50			label = "heartbeat";
     51			gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
     52		};
     53	};
     54};
     55
     56&pinctrl {
     57	key_pins: mux-keys {
     58		groups = "gspi", "sspi";
     59		function = "gpio";
     60	};
     61
     62	led_pins: mux-leds {
     63		groups = "hg3", "hg0", "pwm4";
     64		function = "gpio";
     65	};
     66};
     67
     68&serial0 {
     69	/*
     70	 * Debug serial port. TX is exposed on the right pad of unpopulated
     71	 * resistor R1247, RX on the right pad of R1162.
     72	 */
     73	status = "okay";
     74};
     75
     76&serial1 {
     77	/* "Serial over LAN" port. Connected to ttyS2 of the host system. */
     78	status = "okay";
     79};
     80
     81&watchdog0 {
     82	status = "okay";
     83};