cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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omap2420-n810.dts (1853B)


      1// SPDX-License-Identifier: GPL-2.0
      2/dts-v1/;
      3
      4#include "omap2420-n8x0-common.dtsi"
      5
      6/ {
      7	model = "Nokia N810";
      8	compatible = "nokia,n810", "nokia,n8x0", "ti,omap2420", "ti,omap2";
      9
     10	vio_ape: vio_ape {
     11		compatible = "regulator-fixed";
     12		regulator-name = "vio_ape";
     13		regulator-min-microvolt = <1800000>;
     14		regulator-max-microvolt = <1800000>;
     15	};
     16
     17	v28_aic: v28_aic {
     18		compatible = "regulator-fixed";
     19		regulator-name = "v28_aic";
     20		regulator-min-microvolt = <2800000>;
     21		regulator-max-microvolt = <2800000>;
     22	};
     23};
     24
     25&omap2420_pmx {
     26	mcbsp2_pins: mcbsp2_pins {
     27		pinctrl-single,pins = <
     28			OMAP2420_CORE_IOPAD(0x0124, PIN_INPUT | MUX_MODE1)	/* eac_ac_sclk.mcbsp2_clkx */
     29			OMAP2420_CORE_IOPAD(0x0125, PIN_INPUT | MUX_MODE1)	/* eac_ac_fs.mcbsp2_fsx */
     30			OMAP2420_CORE_IOPAD(0x0126, PIN_INPUT | MUX_MODE1)	/* eac_ac_din.mcbsp2_dr */
     31			OMAP2420_CORE_IOPAD(0x0127, PIN_OUTPUT | MUX_MODE1)	/* eac_ac_dout.mcbsp2_dx */
     32		>;
     33	};
     34
     35	aic33_pins: aic33_pins {
     36		pinctrl-single,pins = <
     37			OMAP2420_CORE_IOPAD(0x0129, PIN_OUTPUT | MUX_MODE3)	/* eac_ac_rst.gpio118 */
     38			OMAP2420_CORE_IOPAD(0x00e8, PIN_OUTPUT | MUX_MODE2)	/* vlynq_tx1.sys_clkout2 */
     39		>;
     40	};
     41};
     42
     43&i2c2 {
     44	aic33@18 {
     45		compatible = "ti,tlv320aic33";
     46		reg = <0x18>;
     47
     48		pinctrl-names = "default";
     49		pinctrl-0 = <&aic33_pins>;
     50
     51		reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; /* gpio118 */
     52
     53		ai3x-gpio-func = <
     54			10 /* AIC3X_GPIO1_FUNC_DIGITAL_MIC_MODCLK */
     55			5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */
     56		>;
     57		ai3x-micbias-vg = <1>; /* 2V */
     58
     59		AVDD-supply = <&v28_aic>;
     60		DRVDD-supply = <&v28_aic>;
     61		IOVDD-supply = <&vio_ape>;
     62		DVDD-supply = <&vio_ape>;
     63
     64		assigned-clocks = <&sys_clkout2_src>, <&sys_clkout2>;
     65		assigned-clock-parents = <&func_96m_ck>;
     66		assigned-clock-rates = <0>, <12000000>;
     67	};
     68};
     69
     70&mcbsp2 {
     71	pinctrl-names = "default";
     72	pinctrl-0 = <&mcbsp2_pins>;
     73
     74	status = "okay";
     75};