omap2430.dtsi (8662B)
1/* 2 * Device Tree Source for OMAP243x SoC 3 * 4 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 5 * 6 * This file is licensed under the terms of the GNU General Public License 7 * version 2. This program is licensed "as is" without any warranty of any 8 * kind, whether express or implied. 9 */ 10 11#include "omap2.dtsi" 12 13/ { 14 compatible = "ti,omap2430", "ti,omap2"; 15 16 ocp { 17 l4_wkup: l4_wkup@49000000 { 18 compatible = "ti,omap2-l4-wkup", "simple-bus"; 19 #address-cells = <1>; 20 #size-cells = <1>; 21 ranges = <0 0x49000000 0x31000>; 22 23 prcm: prcm@6000 { 24 compatible = "ti,omap2-prcm"; 25 reg = <0x6000 0x1000>; 26 27 prcm_clocks: clocks { 28 #address-cells = <1>; 29 #size-cells = <0>; 30 }; 31 32 prcm_clockdomains: clockdomains { 33 }; 34 }; 35 36 scm: scm@2000 { 37 compatible = "ti,omap2-scm", "simple-bus"; 38 reg = <0x2000 0x1000>; 39 #address-cells = <1>; 40 #size-cells = <1>; 41 #pinctrl-cells = <1>; 42 ranges = <0 0x2000 0x1000>; 43 44 omap2430_pmx: pinmux@30 { 45 compatible = "ti,omap2430-padconf", 46 "pinctrl-single"; 47 reg = <0x30 0x0154>; 48 #address-cells = <1>; 49 #size-cells = <0>; 50 #pinctrl-cells = <1>; 51 pinctrl-single,register-width = <8>; 52 pinctrl-single,function-mask = <0x3f>; 53 }; 54 55 scm_conf: scm_conf@270 { 56 compatible = "syscon", 57 "simple-bus"; 58 reg = <0x270 0x240>; 59 #address-cells = <1>; 60 #size-cells = <1>; 61 ranges = <0 0x270 0x240>; 62 63 scm_clocks: clocks { 64 #address-cells = <1>; 65 #size-cells = <0>; 66 }; 67 68 pbias_regulator: pbias_regulator@230 { 69 compatible = "ti,pbias-omap2", "ti,pbias-omap"; 70 reg = <0x230 0x4>; 71 syscon = <&scm_conf>; 72 pbias_mmc_reg: pbias_mmc_omap2430 { 73 regulator-name = "pbias_mmc_omap2430"; 74 regulator-min-microvolt = <1800000>; 75 regulator-max-microvolt = <3000000>; 76 }; 77 }; 78 }; 79 80 scm_clockdomains: clockdomains { 81 }; 82 }; 83 84 target-module@20000 { 85 compatible = "ti,sysc-omap2", "ti,sysc"; 86 reg = <0x20000 0x4>, 87 <0x20004 0x4>; 88 reg-names = "rev", "sysc"; 89 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 90 <SYSC_IDLE_NO>; 91 clocks = <&func_32k_ck>; 92 clock-names = "fck"; 93 #address-cells = <1>; 94 #size-cells = <1>; 95 ranges = <0x0 0x20000 0x1000>; 96 97 counter32k: counter@0 { 98 compatible = "ti,omap-counter32k"; 99 reg = <0 0x20>; 100 }; 101 }; 102 }; 103 104 gpio1: gpio@4900c000 { 105 compatible = "ti,omap2-gpio"; 106 reg = <0x4900c000 0x200>; 107 interrupts = <29>; 108 ti,hwmods = "gpio1"; 109 ti,gpio-always-on; 110 #gpio-cells = <2>; 111 gpio-controller; 112 #interrupt-cells = <2>; 113 interrupt-controller; 114 }; 115 116 gpio2: gpio@4900e000 { 117 compatible = "ti,omap2-gpio"; 118 reg = <0x4900e000 0x200>; 119 interrupts = <30>; 120 ti,hwmods = "gpio2"; 121 ti,gpio-always-on; 122 #gpio-cells = <2>; 123 gpio-controller; 124 #interrupt-cells = <2>; 125 interrupt-controller; 126 }; 127 128 gpio3: gpio@49010000 { 129 compatible = "ti,omap2-gpio"; 130 reg = <0x49010000 0x200>; 131 interrupts = <31>; 132 ti,hwmods = "gpio3"; 133 ti,gpio-always-on; 134 #gpio-cells = <2>; 135 gpio-controller; 136 #interrupt-cells = <2>; 137 interrupt-controller; 138 }; 139 140 gpio4: gpio@49012000 { 141 compatible = "ti,omap2-gpio"; 142 reg = <0x49012000 0x200>; 143 interrupts = <32>; 144 ti,hwmods = "gpio4"; 145 ti,gpio-always-on; 146 #gpio-cells = <2>; 147 gpio-controller; 148 #interrupt-cells = <2>; 149 interrupt-controller; 150 }; 151 152 gpio5: gpio@480b6000 { 153 compatible = "ti,omap2-gpio"; 154 reg = <0x480b6000 0x200>; 155 interrupts = <33>; 156 ti,hwmods = "gpio5"; 157 #gpio-cells = <2>; 158 gpio-controller; 159 #interrupt-cells = <2>; 160 interrupt-controller; 161 }; 162 163 gpmc: gpmc@6e000000 { 164 compatible = "ti,omap2430-gpmc"; 165 reg = <0x6e000000 0x1000>; 166 #address-cells = <2>; 167 #size-cells = <1>; 168 interrupts = <20>; 169 gpmc,num-cs = <8>; 170 gpmc,num-waitpins = <4>; 171 ti,hwmods = "gpmc"; 172 interrupt-controller; 173 #interrupt-cells = <2>; 174 gpio-controller; 175 #gpio-cells = <2>; 176 }; 177 178 mcbsp1: mcbsp@48074000 { 179 compatible = "ti,omap2430-mcbsp"; 180 reg = <0x48074000 0xff>; 181 reg-names = "mpu"; 182 interrupts = <64>, /* OCP compliant interrupt */ 183 <59>, /* TX interrupt */ 184 <60>, /* RX interrupt */ 185 <61>; /* RX overflow interrupt */ 186 interrupt-names = "common", "tx", "rx", "rx_overflow"; 187 ti,buffer-size = <128>; 188 ti,hwmods = "mcbsp1"; 189 dmas = <&sdma 31>, 190 <&sdma 32>; 191 dma-names = "tx", "rx"; 192 status = "disabled"; 193 }; 194 195 mcbsp2: mcbsp@48076000 { 196 compatible = "ti,omap2430-mcbsp"; 197 reg = <0x48076000 0xff>; 198 reg-names = "mpu"; 199 interrupts = <16>, /* OCP compliant interrupt */ 200 <62>, /* TX interrupt */ 201 <63>; /* RX interrupt */ 202 interrupt-names = "common", "tx", "rx"; 203 ti,buffer-size = <128>; 204 ti,hwmods = "mcbsp2"; 205 dmas = <&sdma 33>, 206 <&sdma 34>; 207 dma-names = "tx", "rx"; 208 status = "disabled"; 209 }; 210 211 mcbsp3: mcbsp@4808c000 { 212 compatible = "ti,omap2430-mcbsp"; 213 reg = <0x4808c000 0xff>; 214 reg-names = "mpu"; 215 interrupts = <17>, /* OCP compliant interrupt */ 216 <89>, /* TX interrupt */ 217 <90>; /* RX interrupt */ 218 interrupt-names = "common", "tx", "rx"; 219 ti,buffer-size = <128>; 220 ti,hwmods = "mcbsp3"; 221 dmas = <&sdma 17>, 222 <&sdma 18>; 223 dma-names = "tx", "rx"; 224 status = "disabled"; 225 }; 226 227 mcbsp4: mcbsp@4808e000 { 228 compatible = "ti,omap2430-mcbsp"; 229 reg = <0x4808e000 0xff>; 230 reg-names = "mpu"; 231 interrupts = <18>, /* OCP compliant interrupt */ 232 <54>, /* TX interrupt */ 233 <55>; /* RX interrupt */ 234 interrupt-names = "common", "tx", "rx"; 235 ti,buffer-size = <128>; 236 ti,hwmods = "mcbsp4"; 237 dmas = <&sdma 19>, 238 <&sdma 20>; 239 dma-names = "tx", "rx"; 240 status = "disabled"; 241 }; 242 243 mcbsp5: mcbsp@48096000 { 244 compatible = "ti,omap2430-mcbsp"; 245 reg = <0x48096000 0xff>; 246 reg-names = "mpu"; 247 interrupts = <19>, /* OCP compliant interrupt */ 248 <81>, /* TX interrupt */ 249 <82>; /* RX interrupt */ 250 interrupt-names = "common", "tx", "rx"; 251 ti,buffer-size = <128>; 252 ti,hwmods = "mcbsp5"; 253 dmas = <&sdma 21>, 254 <&sdma 22>; 255 dma-names = "tx", "rx"; 256 status = "disabled"; 257 }; 258 259 mmc1: mmc@4809c000 { 260 compatible = "ti,omap2-hsmmc"; 261 reg = <0x4809c000 0x200>; 262 interrupts = <83>; 263 ti,hwmods = "mmc1"; 264 ti,dual-volt; 265 dmas = <&sdma 61>, <&sdma 62>; 266 dma-names = "tx", "rx"; 267 pbias-supply = <&pbias_mmc_reg>; 268 }; 269 270 mmc2: mmc@480b4000 { 271 compatible = "ti,omap2-hsmmc"; 272 reg = <0x480b4000 0x200>; 273 interrupts = <86>; 274 ti,hwmods = "mmc2"; 275 dmas = <&sdma 47>, <&sdma 48>; 276 dma-names = "tx", "rx"; 277 }; 278 279 mailbox: mailbox@48094000 { 280 compatible = "ti,omap2-mailbox"; 281 reg = <0x48094000 0x200>; 282 interrupts = <26>; 283 ti,hwmods = "mailbox"; 284 #mbox-cells = <1>; 285 ti,mbox-num-users = <4>; 286 ti,mbox-num-fifos = <6>; 287 mbox_dsp: mbox-dsp { 288 ti,mbox-tx = <0 0 0>; 289 ti,mbox-rx = <1 0 0>; 290 }; 291 }; 292 293 timer1_target: target-module@49018000 { 294 compatible = "ti,sysc-omap2-timer", "ti,sysc"; 295 reg = <0x49018000 0x4>, 296 <0x49018010 0x4>, 297 <0x49018014 0x4>; 298 reg-names = "rev", "sysc", "syss"; 299 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | 300 SYSC_OMAP2_EMUFREE | 301 SYSC_OMAP2_ENAWAKEUP | 302 SYSC_OMAP2_SOFTRESET | 303 SYSC_OMAP2_AUTOIDLE)>; 304 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 305 <SYSC_IDLE_NO>, 306 <SYSC_IDLE_SMART>; 307 ti,syss-mask = <1>; 308 clocks = <&gpt1_fck>, <&gpt1_ick>; 309 clock-names = "fck", "ick"; 310 #address-cells = <1>; 311 #size-cells = <1>; 312 ranges = <0x0 0x49018000 0x1000>; 313 314 timer1: timer@0 { 315 compatible = "ti,omap2420-timer"; 316 reg = <0 0x400>; 317 interrupts = <37>; 318 ti,timer-alwon; 319 }; 320 }; 321 322 mcspi3: spi@480b8000 { 323 compatible = "ti,omap2-mcspi"; 324 ti,hwmods = "mcspi3"; 325 reg = <0x480b8000 0x100>; 326 interrupts = <91>; 327 dmas = <&sdma 15 &sdma 16 &sdma 23 &sdma 24>; 328 dma-names = "tx0", "rx0", "tx1", "rx1"; 329 }; 330 331 usb_otg_hs: usb_otg_hs@480ac000 { 332 compatible = "ti,omap2-musb"; 333 ti,hwmods = "usb_otg_hs"; 334 reg = <0x480ac000 0x1000>; 335 interrupts = <93>; 336 }; 337 338 wd_timer2: wdt@49016000 { 339 compatible = "ti,omap2-wdt"; 340 ti,hwmods = "wd_timer2"; 341 reg = <0x49016000 0x80>; 342 }; 343 }; 344}; 345 346&sdma { 347 compatible = "ti,omap2430-sdma", "ti,omap-sdma"; 348}; 349 350&i2c1 { 351 compatible = "ti,omap2430-i2c"; 352}; 353 354&i2c2 { 355 compatible = "ti,omap2430-i2c"; 356}; 357 358#include "omap24xx-clocks.dtsi" 359#include "omap2430-clocks.dtsi" 360 361/* Preferred always-on timer for clockevent */ 362&timer1_target { 363 ti,no-reset-on-init; 364 ti,no-idle; 365 timer@0 { 366 assigned-clocks = <&gpt1_fck>; 367 assigned-clock-parents = <&func_32k_ck>; 368 }; 369};