cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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omap3-cm-t3730.dts (2801B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Support for CompuLab CM-T3730
      4 */
      5/dts-v1/;
      6
      7#include "omap36xx.dtsi"
      8#include "omap3-cm-t3x30.dtsi"
      9
     10/ {
     11	model = "CompuLab CM-T3730";
     12	compatible = "compulab,omap3-cm-t3730", "ti,omap3630", "ti,omap36xx", "ti,omap3";
     13
     14	wl12xx_vmmc2: wl12xx_vmmc2 {
     15		compatible = "regulator-fixed";
     16		regulator-name = "vw1271";
     17		pinctrl-names = "default";
     18		pinctrl-0 = <&wl12xx_gpio>;
     19		regulator-min-microvolt = <1800000>;
     20		regulator-max-microvolt = <1800000>;
     21		gpio = <&gpio3 9 GPIO_ACTIVE_HIGH>;   /* gpio73 */
     22		startup-delay-us = <20000>;
     23		enable-active-high;
     24	};
     25
     26	wl12xx_vaux2: wl12xx_vaux2 {
     27		compatible = "regulator-fixed";
     28		regulator-name = "vwl1271_vaux2";
     29		regulator-min-microvolt = <1800000>;
     30		regulator-max-microvolt = <1800000>;
     31		vin-supply = <&vaux2>;
     32	};
     33};
     34
     35&omap3_pmx_wkup {
     36	dss_dpi_pins_cm_t3730: pinmux_dss_dpi_pins_cm_t3730 {
     37		pinctrl-single,pins = <
     38			OMAP3_WKUP_IOPAD(0x2a08, PIN_OUTPUT | MUX_MODE3)   /* sys_boot0.dss_data18 */
     39			OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE3)   /* sys_boot1.dss_data19 */
     40			OMAP3_WKUP_IOPAD(0x2a10, PIN_OUTPUT | MUX_MODE3)   /* sys_boot3.dss_data20 */
     41			OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE3)   /* sys_boot4.dss_data21 */
     42			OMAP3_WKUP_IOPAD(0x2a14, PIN_OUTPUT | MUX_MODE3)   /* sys_boot5.dss_data22 */
     43			OMAP3_WKUP_IOPAD(0x2a16, PIN_OUTPUT | MUX_MODE3)   /* sys_boot6.dss_data23 */
     44		>;
     45	};
     46};
     47
     48&omap3_pmx_core {
     49
     50	mmc2_pins: pinmux_mmc2_pins {
     51		pinctrl-single,pins = <
     52			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_clk.sdmmc2_clk */
     53			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_cmd.sdmmc2_cmd */
     54			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat0.sdmmc2_dat0 */
     55			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat1.sdmmc2_dat1 */
     56			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat2.sdmmc2_dat2 */
     57			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat3.sdmmc2_dat3 */
     58		>;
     59	};
     60
     61	wl12xx_gpio: pinmux_wl12xx_gpio {
     62		pinctrl-single,pins = <
     63			OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4)	/* dss_data3.gpio_73 */
     64			OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT | MUX_MODE4)	/* sdmmc2_dat4.gpio_136 */
     65		>;
     66	};
     67};
     68
     69&mmc2 {
     70	pinctrl-names = "default";
     71	pinctrl-0 = <&mmc2_pins>;
     72	vmmc-supply = <&wl12xx_vmmc2>;
     73	vqmmc-supply = <&wl12xx_vaux2>;
     74	non-removable;
     75	bus-width = <4>;
     76	cap-power-off-card;
     77
     78	#address-cells = <1>;
     79	#size-cells = <0>;
     80	wlcore: wlcore@2 {
     81		compatible = "ti,wl1271";
     82		reg = <2>;
     83		interrupt-parent = <&gpio5>;
     84		interrupts = <8 IRQ_TYPE_EDGE_RISING>; /* gpio 136 */
     85		ref-clock-frequency = <38400000>;
     86	};
     87};
     88
     89&dss {
     90	status = "okay";
     91
     92	pinctrl-names = "default";
     93	pinctrl-0 = <
     94		&dss_dpi_pins_common
     95		&dss_dpi_pins_cm_t3730
     96	>;
     97};
     98