cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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omap3-igep0020.dts (1400B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Device Tree Source for IGEPv2 Rev. C (TI OMAP AM/DM37x)
      4 *
      5 * Copyright (C) 2012 Javier Martinez Canillas <javier@dowhile0.org>
      6 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
      7 */
      8
      9#include "omap3-igep0020-common.dtsi"
     10
     11/ {
     12	model = "IGEPv2 Rev. C (TI OMAP AM/DM37x)";
     13	compatible = "isee,omap3-igep0020", "ti,omap3630", "ti,omap36xx", "ti,omap3";
     14
     15	vmmcsdio_fixed: fixedregulator-mmcsdio {
     16		compatible = "regulator-fixed";
     17		regulator-name = "vmmcsdio_fixed";
     18		regulator-min-microvolt = <3300000>;
     19		regulator-max-microvolt = <3300000>;
     20	};
     21
     22	mmc2_pwrseq: mmc2_pwrseq {
     23		compatible = "mmc-pwrseq-simple";
     24		reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>,	/* gpio_139 - RESET_N_W */
     25			      <&gpio5 10 GPIO_ACTIVE_LOW>;	/* gpio_138 - WIFI_PDN */
     26	};
     27};
     28
     29&omap3_pmx_core {
     30	lbee1usjyc_pins: pinmux_lbee1usjyc_pins {
     31		pinctrl-single,pins = <
     32			OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE4)	/* sdmmc2_dat5.gpio_137 - RESET_N_W */
     33			OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE4)	/* sdmmc2_dat6.gpio_138 - WIFI_PDN */
     34			OMAP3_CORE1_IOPAD(0x216a, PIN_OUTPUT | MUX_MODE4)	/* sdmmc2_dat7.gpio_139 - RST_N_B */
     35		>;
     36	};
     37};
     38
     39/* On board Wifi module */
     40&mmc2 {
     41	pinctrl-names = "default";
     42	pinctrl-0 = <&mmc2_pins &lbee1usjyc_pins>;
     43	vmmc-supply = <&vmmcsdio_fixed>;
     44	mmc-pwrseq = <&mmc2_pwrseq>;
     45	bus-width = <4>;
     46	non-removable;
     47};