cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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omap3-igep0030-rev-g.dts (2028B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Device Tree Source for IGEP COM MODULE Rev. G (TI OMAP AM/DM37x)
      4 *
      5 * Copyright (C) 2014 Javier Martinez Canillas <javier@dowhile0.org>
      6 * Copyright (C) 2014 Enric Balletbo i Serra <eballetbo@gmail.com>
      7 */
      8
      9#include "omap3-igep0030-common.dtsi"
     10
     11/ {
     12	model = "IGEP COM MODULE Rev. G (TI OMAP AM/DM37x)";
     13	compatible = "isee,omap3-igep0030-rev-g", "ti,omap3630", "ti,omap36xx", "ti,omap3";
     14
     15	/* Regulator to trigger the WL_EN signal of the Wifi module */
     16	lbep5clwmc_wlen: regulator-lbep5clwmc-wlen {
     17		compatible = "regulator-fixed";
     18		regulator-name = "regulator-lbep5clwmc-wlen";
     19		regulator-min-microvolt = <3300000>;
     20		regulator-max-microvolt = <3300000>;
     21		gpio = <&gpio5 11 GPIO_ACTIVE_HIGH>;		/* gpio_139 - WL_EN */
     22		enable-active-high;
     23	};
     24};
     25
     26&omap3_pmx_core {
     27	lbep5clwmc_pins: pinmux_lbep5clwmc_pins {
     28		pinctrl-single,pins = <
     29			OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT | MUX_MODE4)	/* sdmmc2_dat4.gpio_136 - W_IRQ */
     30			OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE4)	/* sdmmc2_dat5.gpio_137 - BT_EN */
     31			OMAP3_CORE1_IOPAD(0x216a, PIN_OUTPUT | MUX_MODE4)	/* sdmmc2_dat7.gpio_139 - WL_EN */
     32		>;
     33	};
     34
     35	leds_pins: pinmux_leds_pins {
     36		pinctrl-single,pins = <
     37			OMAP3_CORE1_IOPAD(0x21be, PIN_OUTPUT | MUX_MODE4)	/* i2c2_scl.gpio_168 */
     38		>;
     39	};
     40
     41};
     42
     43&i2c2 {
     44	status = "disabled";
     45};
     46
     47&leds {
     48	pinctrl-names = "default";
     49	pinctrl-0 = <&leds_pins &leds_core2_pins>;
     50
     51	boot {
     52		label = "omap3:green:boot";
     53		gpios = <&gpio6 8 GPIO_ACTIVE_HIGH>;
     54		default-state = "on";
     55	};
     56};
     57
     58&mmc2 {
     59	pinctrl-names = "default";
     60	pinctrl-0 = <&mmc2_pins &lbep5clwmc_pins>;
     61	vmmc-supply = <&lbep5clwmc_wlen>;
     62	bus-width = <4>;
     63	non-removable;
     64
     65	#address-cells = <1>;
     66	#size-cells = <0>;
     67	wlcore: wlcore@2 {
     68		compatible = "ti,wl1835";
     69		reg = <2>;
     70		interrupt-parent = <&gpio5>;
     71		interrupts = <8 IRQ_TYPE_EDGE_RISING>; /* gpio 136 */
     72	};
     73};
     74
     75&uart2 {
     76	bluetooth {
     77		compatible = "ti,wl1835-st";
     78		enable-gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>; /* gpio 137 */
     79		max-speed = <300000>;
     80	};
     81};