cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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omap3-overo-common-lcd43.dtsi (5289B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Copyright (C) 2014 Florian Vaussard, EPFL Mobots group
      4 */
      5
      6/*
      7 * 4.3'' LCD panel output for some Gumstix Overo boards (Gallop43, Chestnut43)
      8 */
      9
     10&omap3_pmx_core {
     11	dss_dpi_pins: pinmux_dss_dpi_pins {
     12		pinctrl-single,pins = <
     13			OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)	/* dss_pclk.dss_pclk */
     14			OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)	/* dss_hsync.dss_hsync */
     15			OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)	/* dss_vsync.dss_vsync */
     16			OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)	/* dss_acbias.dss_acbias */
     17			OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0)	/* dss_data0.dss_data0 */
     18			OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0)	/* dss_data1.dss_data1 */
     19			OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0)	/* dss_data2.dss_data2 */
     20			OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0)	/* dss_data3.dss_data3 */
     21			OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0)	/* dss_data4.dss_data4 */
     22			OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0)	/* dss_data5.dss_data5 */
     23			OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)	/* dss_data6.dss_data6 */
     24			OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)	/* dss_data7.dss_data7 */
     25			OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)	/* dss_data8.dss_data8 */
     26			OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)	/* dss_data9.dss_data9 */
     27			OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)	/* dss_data10.dss_data10 */
     28			OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)	/* dss_data11.dss_data11 */
     29			OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)	/* dss_data12.dss_data12 */
     30			OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)	/* dss_data13.dss_data13 */
     31			OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)	/* dss_data14.dss_data14 */
     32			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)	/* dss_data15.dss_data15 */
     33			OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)	/* dss_data16.dss_data16 */
     34			OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)	/* dss_data17.dss_data17 */
     35			OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0)	/* dss_data18.dss_data18 */
     36			OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0)	/* dss_data19.dss_data19 */
     37			OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0)	/* dss_data20.dss_data20 */
     38			OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0)	/* dss_data21.dss_data21 */
     39			OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0)	/* dss_data22.dss_data22 */
     40			OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)	/* dss_data23.dss_data23 */
     41		>;
     42	};
     43
     44	lte430_pins: pinmux_lte430_pins {
     45		pinctrl-single,pins = <
     46			OMAP3_CORE1_IOPAD(0x2174, PIN_OUTPUT | MUX_MODE4)	/* uart2_cts.gpio_144 */
     47		>;
     48	};
     49
     50	backlight_pins: pinmux_backlight_pins {
     51		pinctrl-single,pins = <
     52			OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE4)	/* uart2_rts.gpio_145 */
     53		>;
     54	};
     55
     56	mcspi1_pins: pinmux_mcspi1_pins {
     57		pinctrl-single,pins = <
     58			OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0)	/* mcspi1_clk.mcspi1_clk */
     59			OMAP3_CORE1_IOPAD(0x21ca, PIN_INPUT | MUX_MODE0)	/* mcspi1_simo.mcspi1_simo */
     60			OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT | MUX_MODE0)	/* mcspi1_somi.mcspi1_somi */
     61			OMAP3_CORE1_IOPAD(0x21ce, PIN_INPUT | MUX_MODE0)	/* mcspi1_cs0.mcspi1_cs0 */
     62		>;
     63	};
     64
     65	ads7846_pins: pinmux_ads7846_pins {
     66		pinctrl-single,pins = <
     67			OMAP3_CORE1_IOPAD(0x2138, PIN_INPUT_PULLDOWN | MUX_MODE4)	/* csi2_dx1.gpio_114 */
     68		>;
     69	};
     70};
     71
     72/* Needed to power the DPI pins */
     73&vpll2 {
     74	regulator-always-on;
     75};
     76
     77&dss {
     78	status = "okay";
     79
     80	pinctrl-names = "default";
     81	pinctrl-0 = <&dss_dpi_pins>;
     82
     83	port {
     84		dpi_out: endpoint {
     85			remote-endpoint = <&lcd_in>;
     86			data-lines = <24>;
     87		};
     88	};
     89};
     90
     91/ {
     92	aliases {
     93		display0 = &lcd0;
     94	};
     95
     96	lcd0: display {
     97		compatible = "samsung,lte430wq-f0c", "panel-dpi";
     98		label = "lcd43";
     99
    100		pinctrl-names = "default";
    101		pinctrl-0 = <&lte430_pins>;
    102		enable-gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>;		/* gpio_144 */
    103
    104		port {
    105			lcd_in: endpoint {
    106				remote-endpoint = <&dpi_out>;
    107			};
    108		};
    109
    110		panel-timing {
    111			clock-frequency = <9200000>;
    112			hactive = <480>;
    113			vactive = <272>;
    114			hfront-porch = <8>;
    115			hback-porch = <4>;
    116			hsync-len = <41>;
    117			vback-porch = <2>;
    118			vfront-porch = <4>;
    119			vsync-len = <10>;
    120
    121			hsync-active = <0>;
    122			vsync-active = <0>;
    123			de-active = <1>;
    124			pixelclk-active = <1>;
    125		};
    126	};
    127
    128	ads7846reg: ads7846-reg {
    129		compatible = "regulator-fixed";
    130		regulator-name = "ads7846-reg";
    131		regulator-min-microvolt = <3300000>;
    132		regulator-max-microvolt = <3300000>;
    133	};
    134
    135	backlight {
    136		compatible = "gpio-backlight";
    137		
    138		pinctrl-names = "default";
    139		pinctrl-0 = <&backlight_pins>;
    140		gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;		/* gpio_145 */
    141
    142		default-on;
    143	};
    144};
    145
    146&mcspi1 {
    147	pinctrl-names = "default";
    148	pinctrl-0 = <&mcspi1_pins>;
    149
    150	/* touch controller */
    151	ads7846@0 {
    152		pinctrl-names = "default";
    153		pinctrl-0 = <&ads7846_pins>;
    154
    155		compatible = "ti,ads7846";
    156		vcc-supply = <&ads7846reg>;
    157
    158		reg = <0>;				/* CS0 */
    159		spi-max-frequency = <1500000>;
    160
    161		interrupt-parent = <&gpio4>;
    162		interrupts = <18 0>;			/* gpio_114 */
    163		pendown-gpio = <&gpio4 18 GPIO_ACTIVE_HIGH>;
    164
    165		ti,x-min = /bits/ 16 <0x0>;
    166		ti,x-max = /bits/ 16 <0x0fff>;
    167		ti,y-min = /bits/ 16 <0x0>;
    168		ti,y-max = /bits/ 16 <0x0fff>;
    169		ti,x-plate-ohms = /bits/ 16 <180>;
    170		ti,pressure-max = /bits/ 16 <255>;
    171
    172		wakeup-source;
    173	};
    174};
    175