cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

omap3-overo-common-peripherals.dtsi (2038B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Copyright (C) 2014 Florian Vaussard, EPFL Mobots group
      4 */
      5
      6/*
      7 * Peripherals common to all Gumstix Overo boards (Tobi, Summit, Palo43,...)
      8 */
      9
     10/ {
     11	lis33_3v3: lis33-3v3-reg {
     12		compatible = "regulator-fixed";
     13		regulator-name = "lis33-3v3-reg";
     14		regulator-min-microvolt = <3300000>;
     15		regulator-max-microvolt = <3300000>;
     16	};
     17
     18	lis33_1v8: lis33-1v8-reg {
     19		compatible = "regulator-fixed";
     20		regulator-name = "lis33-1v8-reg";
     21		regulator-min-microvolt = <1800000>;
     22		regulator-max-microvolt = <1800000>;
     23	};
     24};
     25
     26&omap3_pmx_core {
     27	i2c3_pins: pinmux_i2c3_pins {
     28		pinctrl-single,pins = <
     29			OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)	/* i2c3_scl.i2c3_scl */
     30			OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)	/* i2c3_sda.i2c3_sda */
     31		>;
     32	};
     33
     34	uart3_pins: pinmux_uart3_pins {
     35		pinctrl-single,pins = <
     36			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)	/* uart3_rx_irrx.uart3_rx_irrx */
     37			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)	/* uart3_tx_irtx.uart3_tx_irtx */
     38		>;
     39	};
     40};
     41
     42&i2c3 {
     43	pinctrl-names = "default";
     44	pinctrl-0 = <&i2c3_pins>;
     45	clock-frequency = <100000>;
     46
     47	/* optional 1K EEPROM with revision information */
     48	eeprom@51 {
     49		compatible = "atmel,24c01";
     50		reg = <0x51>;
     51		pagesize = <8>;
     52	};
     53
     54	lis33de: lis33de@1d {
     55		compatible = "st,lis33de", "st,lis3lv02d";
     56		reg = <0x1d>;
     57		Vdd-supply = <&lis33_1v8>;
     58		Vdd_IO-supply = <&lis33_3v3>;
     59
     60		st,click-single-x;
     61		st,click-single-y;
     62		st,click-single-z;
     63		st,click-thresh-x = <10>;
     64		st,click-thresh-y = <10>;
     65		st,click-thresh-z = <10>;
     66		st,irq1-click;
     67		st,irq2-click;
     68		st,wakeup-x-lo;
     69		st,wakeup-x-hi;
     70		st,wakeup-y-lo;
     71		st,wakeup-y-hi;
     72		st,wakeup-z-lo;
     73		st,wakeup-z-hi;
     74		st,min-limit-x = <120>;
     75		st,min-limit-y = <120>;
     76		st,min-limit-z = <140>;
     77		st,max-limit-x = <550>;
     78		st,max-limit-y = <550>;
     79		st,max-limit-z = <750>;
     80	};
     81};
     82
     83&mmc3 {
     84	status = "disabled";
     85};
     86
     87&uart3 {
     88	interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
     89	pinctrl-names = "default";
     90	pinctrl-0 = <&uart3_pins>;
     91};
     92