cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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omap3-thunder.dts (4109B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
      4 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
      5 */
      6
      7#include "omap3-tao3530.dtsi"
      8
      9/ {
     10	model = "TI OMAP3 Thunder baseboard with TAO3530 SOM";
     11	compatible = "technexion,omap3-thunder", "technexion,omap3-tao3530", "ti,omap3430", "ti,omap34xx", "ti,omap3";
     12};
     13
     14&omap3_pmx_core {
     15	dss_dpi_pins: pinmux_dss_dpi_pins {
     16		pinctrl-single,pins = <
     17			OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)	/* dss_pclk.dss_pclk */
     18			OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)	/* dss_hsync.dss_hsync */
     19			OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)	/* dss_vsync.dss_vsync */
     20			OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)	/* dss_acbias.dss_acbias */
     21			OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0)	/* dss_data0.dss_data0 */
     22			OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0)	/* dss_data1.dss_data1 */
     23			OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0)	/* dss_data2.dss_data2 */
     24			OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0)	/* dss_data3.dss_data3 */
     25			OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0)	/* dss_data4.dss_data4 */
     26			OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0)	/* dss_data5.dss_data5 */
     27			OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)	/* dss_data6.dss_data6 */
     28			OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)	/* dss_data7.dss_data7 */
     29			OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)	/* dss_data8.dss_data8 */
     30			OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)	/* dss_data9.dss_data9 */
     31			OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)	/* dss_data10.dss_data10 */
     32			OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)	/* dss_data11.dss_data11 */
     33			OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)	/* dss_data12.dss_data12 */
     34			OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)	/* dss_data13.dss_data13 */
     35			OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)	/* dss_data14.dss_data14 */
     36			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)	/* dss_data15.dss_data15 */
     37			OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)	/* dss_data16.dss_data16 */
     38			OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)	/* dss_data17.dss_data17 */
     39			OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0)	/* dss_data18.dss_data18 */
     40			OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0)	/* dss_data19.dss_data19 */
     41			OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0)	/* dss_data20.dss_data20 */
     42			OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0)	/* dss_data21.dss_data21 */
     43			OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0)	/* dss_data22.dss_data22 */
     44			OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)	/* dss_data23.dss_data23 */
     45		>;
     46	};
     47
     48	lte430_pins: pinmux_lte430_pins {
     49		pinctrl-single,pins = <
     50			OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE4)	/* sdmmc2_dat6.gpio_138 */
     51		>;
     52	};
     53
     54	backlight_pins: pinmux_backlight_pins {
     55		pinctrl-single,pins = <
     56			OMAP3_CORE1_IOPAD(0x216a, PIN_OUTPUT | MUX_MODE4)	/* sdmmc2_dat7.gpio_139 */
     57		>;
     58	};
     59};
     60
     61/* Needed to power the DPI pins */
     62&vpll2 {
     63	regulator-always-on;
     64};
     65
     66&dss {
     67	status = "okay";
     68
     69	pinctrl-names = "default";
     70	pinctrl-0 = <&dss_dpi_pins>;
     71
     72	port {
     73		dpi_out: endpoint {
     74			remote-endpoint = <&lcd_in>;
     75			data-lines = <24>;
     76		};
     77	};
     78};
     79
     80/ {
     81	aliases {
     82		display0 = &lcd0;
     83	};
     84
     85	lcd0: display {
     86		compatible = "samsung,lte430wq-f0c", "panel-dpi";
     87		label = "lcd";
     88
     89		pinctrl-names = "default";
     90		pinctrl-0 = <&lte430_pins>;
     91		enable-gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;	/* gpio_138 */
     92
     93		port {
     94			lcd_in: endpoint {
     95				remote-endpoint = <&dpi_out>;
     96			};
     97		};
     98
     99		panel-timing {
    100			clock-frequency = <9000000>;
    101			hactive = <480>;
    102			vactive = <272>;
    103			hfront-porch = <3>;
    104			hback-porch = <2>;
    105			hsync-len = <42>;
    106			vback-porch = <2>;
    107			vfront-porch = <3>;
    108			vsync-len = <11>;
    109
    110			hsync-active = <0>;
    111			vsync-active = <0>;
    112			de-active = <1>;
    113			pixelclk-active = <1>;
    114		};
    115	};
    116
    117	backlight {
    118		compatible = "gpio-backlight";
    119
    120		pinctrl-names = "default";
    121		pinctrl-0 = <&backlight_pins>;
    122		gpios = <&gpio5 11 GPIO_ACTIVE_HIGH>;		/* gpio_139 */
    123
    124		default-on;
    125	};
    126};