omap4-var-som-om44.dtsi (7551B)
1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (C) 2014 Joachim Eastwood <manabian@gmail.com> 4 * Copyright (C) 2012 Variscite Ltd. - https://www.variscite.com 5 */ 6#include "omap4460.dtsi" 7#include "omap4-mcpdm.dtsi" 8 9/ { 10 model = "Variscite VAR-SOM-OM44"; 11 compatible = "variscite,var-som-om44", "ti,omap4460", "ti,omap4"; 12 13 memory@80000000 { 14 device_type = "memory"; 15 reg = <0x80000000 0x40000000>; /* 1 GB */ 16 }; 17 18 sound: sound { 19 compatible = "ti,abe-twl6040"; 20 ti,model = "VAR-SOM-OM44"; 21 22 ti,mclk-freq = <38400000>; 23 ti,mcpdm = <&mcpdm>; 24 ti,twl6040 = <&twl6040>; 25 26 /* Audio routing */ 27 ti,audio-routing = 28 "Headset Stereophone", "HSOL", 29 "Headset Stereophone", "HSOR", 30 "AFML", "Line In", 31 "AFMR", "Line In"; 32 }; 33 34 /* HS USB Host PHY on PORT 1 */ 35 hsusb1_phy: hsusb1_phy { 36 compatible = "usb-nop-xceiv"; 37 pinctrl-names = "default"; 38 pinctrl-0 = < 39 &hsusbb1_phy_clk_pins 40 &hsusbb1_phy_rst_pins 41 >; 42 43 reset-gpios = <&gpio6 17 GPIO_ACTIVE_LOW>; /* gpio 177 */ 44 vcc-supply = <&vbat>; 45 #phy-cells = <0>; 46 47 clocks = <&auxclk3_ck>; 48 clock-names = "main_clk"; 49 clock-frequency = <19200000>; 50 }; 51 52 vbat: fixedregulator-vbat { 53 compatible = "regulator-fixed"; 54 regulator-name = "VBAT"; 55 regulator-min-microvolt = <3300000>; 56 regulator-max-microvolt = <3300000>; 57 regulator-always-on; 58 regulator-boot-on; 59 }; 60}; 61 62&omap4_pmx_core { 63 pinctrl-names = "default"; 64 pinctrl-0 = < 65 &hsusbb1_pins 66 >; 67 68 twl6040_pins: pinmux_twl6040_pins { 69 pinctrl-single,pins = < 70 OMAP4_IOPAD(0x19c, PIN_OUTPUT | MUX_MODE3) /* fref_clk2_out.gpio_182 */ 71 OMAP4_IOPAD(0x1a0, PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */ 72 >; 73 }; 74 75 tsc2004_pins: pinmux_tsc2004_pins { 76 pinctrl-single,pins = < 77 OMAP4_IOPAD(0x090, PIN_INPUT | MUX_MODE3) /* gpmc_ncs4.gpio_101 (irq) */ 78 OMAP4_IOPAD(0x092, PIN_OUTPUT | MUX_MODE3) /* gpmc_ncs5.gpio_102 (rst) */ 79 >; 80 }; 81 82 uart3_pins: pinmux_uart3_pins { 83 pinctrl-single,pins = < 84 OMAP4_IOPAD(0x140, PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */ 85 OMAP4_IOPAD(0x142, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */ 86 OMAP4_IOPAD(0x144, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ 87 OMAP4_IOPAD(0x146, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */ 88 >; 89 }; 90 91 hsusbb1_pins: pinmux_hsusbb1_pins { 92 pinctrl-single,pins = < 93 OMAP4_IOPAD(0x0c2, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_clk.usbb1_ulpiphy_clk */ 94 OMAP4_IOPAD(0x0c4, PIN_OUTPUT | MUX_MODE4) /* usbb1_ulpitll_stp.usbb1_ulpiphy_stp */ 95 OMAP4_IOPAD(0x0c6, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dir.usbb1_ulpiphy_dir */ 96 OMAP4_IOPAD(0x0c8, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_nxt.usbb1_ulpiphy_nxt */ 97 OMAP4_IOPAD(0x0ca, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat0.usbb1_ulpiphy_dat0 */ 98 OMAP4_IOPAD(0x0cc, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat1.usbb1_ulpiphy_dat1 */ 99 OMAP4_IOPAD(0x0ce, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat2.usbb1_ulpiphy_dat2 */ 100 OMAP4_IOPAD(0x0d0, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat3.usbb1_ulpiphy_dat3 */ 101 OMAP4_IOPAD(0x0d2, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat4.usbb1_ulpiphy_dat4 */ 102 OMAP4_IOPAD(0x0d4, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat5.usbb1_ulpiphy_dat5 */ 103 OMAP4_IOPAD(0x0d6, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat6.usbb1_ulpiphy_dat6 */ 104 OMAP4_IOPAD(0x0d8, PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat7.usbb1_ulpiphy_dat7 */ 105 >; 106 }; 107 108 hsusbb1_phy_rst_pins: pinmux_hsusbb1_phy_rst_pins { 109 pinctrl-single,pins = < 110 OMAP4_IOPAD(0x18c, PIN_OUTPUT | MUX_MODE3) /* kpd_row2.gpio_177 */ 111 >; 112 }; 113 114 i2c1_pins: pinmux_i2c1_pins { 115 pinctrl-single,pins = < 116 OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */ 117 OMAP4_IOPAD(0x124, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */ 118 >; 119 }; 120 121 i2c3_pins: pinmux_i2c3_pins { 122 pinctrl-single,pins = < 123 OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */ 124 OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */ 125 >; 126 }; 127 128 mmc1_pins: pinmux_mmc1_pins { 129 pinctrl-single,pins = < 130 OMAP4_IOPAD(0x0e2, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ 131 OMAP4_IOPAD(0x0e4, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */ 132 OMAP4_IOPAD(0x0e6, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */ 133 OMAP4_IOPAD(0x0e8, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ 134 OMAP4_IOPAD(0x0ea, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ 135 OMAP4_IOPAD(0x0ec, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ 136 >; 137 }; 138}; 139 140&omap4_pmx_wkup { 141 pinctrl-names = "default"; 142 pinctrl-0 = < 143 &hsusbb1_hub_rst_pins 144 &lan7500_rst_pins 145 >; 146 147 hsusbb1_phy_clk_pins: pinmux_hsusbb1_phy_clk_pins { 148 pinctrl-single,pins = < 149 OMAP4_IOPAD(0x058, PIN_OUTPUT | MUX_MODE0) /* fref_clk3_out */ 150 >; 151 }; 152 153 hsusbb1_hub_rst_pins: pinmux_hsusbb1_hub_rst_pins { 154 pinctrl-single,pins = < 155 OMAP4_IOPAD(0x042, PIN_OUTPUT | MUX_MODE3) /* gpio_wk1 */ 156 >; 157 }; 158 159 lan7500_rst_pins: pinmux_lan7500_rst_pins { 160 pinctrl-single,pins = < 161 OMAP4_IOPAD(0x040, PIN_OUTPUT | MUX_MODE3) /* gpio_wk0 */ 162 >; 163 }; 164}; 165 166&i2c1 { 167 pinctrl-names = "default"; 168 pinctrl-0 = <&i2c1_pins>; 169 status = "okay"; 170 171 clock-frequency = <400000>; 172 173 twl: twl@48 { 174 reg = <0x48>; 175 /* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */ 176 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */ 177 }; 178 179 twl6040: twl@4b { 180 compatible = "ti,twl6040"; 181 #clock-cells = <0>; 182 reg = <0x4b>; 183 184 pinctrl-names = "default"; 185 pinctrl-0 = <&twl6040_pins>; 186 187 /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */ 188 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */ 189 ti,audpwron-gpio = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* gpio 182 */ 190 191 vio-supply = <&v1v8>; 192 v2v1-supply = <&v2v1>; 193 enable-active-high; 194 }; 195}; 196 197#include "twl6030.dtsi" 198#include "twl6030_omap4.dtsi" 199 200&vusim { 201 regulator-min-microvolt = <3000000>; 202 regulator-max-microvolt = <3000000>; 203 regulator-always-on; 204}; 205 206&i2c2 { 207 status = "disabled"; 208}; 209 210&i2c3 { 211 pinctrl-names = "default"; 212 pinctrl-0 = <&i2c3_pins>; 213 status = "okay"; 214 215 clock-frequency = <400000>; 216 217 touchscreen: tsc2004@48 { 218 compatible = "ti,tsc2004"; 219 reg = <0x48>; 220 pinctrl-names = "default"; 221 pinctrl-0 = <&tsc2004_pins>; 222 interrupt-parent = <&gpio4>; 223 interrupts = <5 IRQ_TYPE_LEVEL_LOW>; /* gpio 101 */ 224 status = "disabled"; 225 }; 226 227 tmp105@49 { 228 compatible = "ti,tmp105"; 229 reg = <0x49>; 230 }; 231 232 eeprom@50 { 233 compatible = "microchip,24c32", "atmel,24c32"; 234 reg = <0x50>; 235 }; 236}; 237 238&i2c4 { 239 status = "disabled"; 240}; 241 242&gpmc { 243 status = "disabled"; 244}; 245 246&mcspi1 { 247 status = "disabled"; 248}; 249 250&mcspi2 { 251 status = "disabled"; 252}; 253 254&mcspi3 { 255 status = "disabled"; 256}; 257 258&mcspi4 { 259 status = "disabled"; 260}; 261 262&mmc1 { 263 pinctrl-names = "default"; 264 pinctrl-0 = <&mmc1_pins>; 265 vmmc-supply = <&vmmc>; 266 bus-width = <4>; 267 ti,non-removable; 268 status = "okay"; 269}; 270 271&mmc2 { 272 status = "disabled"; 273}; 274 275&mmc3 { 276 status = "disabled"; 277}; 278 279&mmc4 { 280 status = "disabled"; 281}; 282 283&mmc5 { 284 status = "disabled"; 285}; 286 287&uart1 { 288 status = "disabled"; 289}; 290 291&uart2 { 292 status = "disabled"; 293}; 294 295&uart3 { 296 pinctrl-names = "default"; 297 pinctrl-0 = <&uart3_pins>; 298 status = "okay"; 299}; 300 301&uart4 { 302 status = "disabled"; 303}; 304 305&keypad { 306 status = "disabled"; 307}; 308 309&twl_usb_comparator { 310 usb-supply = <&vusb>; 311}; 312 313&usb_otg_hs { 314 interface-type = <1>; 315 mode = <3>; 316 power = <50>; 317}; 318 319&usbhshost { 320 port1-mode = "ehci-phy"; 321}; 322 323&usbhsehci { 324 phys = <&hsusb1_phy>; 325};