cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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omap443x.dtsi (1892B)


      1/*
      2 * Device Tree Source for OMAP443x SoC
      3 *
      4 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
      5 *
      6 * This file is licensed under the terms of the GNU General Public License
      7 * version 2.  This program is licensed "as is" without any warranty of any
      8 * kind, whether express or implied.
      9 */
     10
     11#include "omap4.dtsi"
     12
     13/ {
     14	cpus {
     15		cpu0: cpu@0 {
     16			/* OMAP443x variants OPP50-OPPNT */
     17			operating-points = <
     18				/* kHz    uV */
     19				300000  1025000
     20				600000  1200000
     21				800000  1313000
     22				1008000 1375000
     23			>;
     24			clock-latency = <300000>; /* From legacy driver */
     25
     26			/* cooling options */
     27			#cooling-cells = <2>; /* min followed by max */
     28		};
     29	};
     30
     31	thermal-zones {
     32		#include "omap4-cpu-thermal.dtsi"
     33	};
     34
     35	ocp {
     36		/* 4430 has only gpio_86 tshut and no talert interrupt */
     37		bandgap: bandgap@4a002260 {
     38			reg = <0x4a002260 0x4
     39			       0x4a00232C 0x4>;
     40			compatible = "ti,omap4430-bandgap";
     41			gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
     42
     43			#thermal-sensor-cells = <0>;
     44		};
     45	};
     46
     47	ocp {
     48		abb_mpu: regulator-abb-mpu {
     49			status = "okay";
     50
     51			reg = <0x4a307bd0 0x8>, <0x4a306014 0x4>;
     52			reg-names = "base-address", "int-address";
     53
     54			ti,abb_info = <
     55			/*uV		ABB	efuse	rbb_m	fbb_m	vset_m*/
     56			1025000		0	0	0	0	0
     57			1200000		0	0	0	0	0
     58			1313000		0	0	0	0	0
     59			1375000		1	0	0	0	0
     60			1389000		1	0	0	0	0
     61			>;
     62		};
     63
     64		/* Default unused, just provide register info for record */
     65		abb_iva: regulator-abb-iva {
     66			reg = <0x4a307bd8 0x8>, <0x4a306010 0x4>;
     67			reg-names = "base-address", "int-address";
     68		};
     69
     70	};
     71
     72};
     73
     74&cpu_thermal {
     75	coefficients = <0 20000>;
     76};
     77
     78/include/ "omap443x-clocks.dtsi"
     79
     80/*
     81 * Use dpll_per for sgx at 307.2MHz like droid4 stock v3.0.8 Android kernel
     82 */
     83&sgx_module {
     84	assigned-clocks = <&l3_gfx_clkctrl OMAP4_GPU_CLKCTRL 24>,
     85			  <&dpll_per_m7x2_ck>;
     86	assigned-clock-rates = <0>, <307200000>;
     87	assigned-clock-parents = <&dpll_per_m7x2_ck>;
     88};