cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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omap5-sbc-t54.dts (1121B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Suppport for CompuLab CM-T54 on SB-T54 baseboard
      4 */
      5
      6#include "omap5-cm-t54.dts"
      7
      8/ {
      9	model = "CompuLab CM-T54 on SB-T54";
     10	compatible = "compulab,omap5-sbc-t54", "compulab,omap5-cm-t54", "ti,omap5";
     11};
     12
     13&omap5_pmx_core {
     14	i2c4_pins: pinmux_i2c4_pins {
     15		pinctrl-single,pins = <
     16			OMAP5_IOPAD(0x00f8, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */
     17			OMAP5_IOPAD(0x00fa, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
     18		>;
     19	};
     20
     21	mmc1_aux_pins: pinmux_mmc1_aux_pins {
     22		pinctrl-single,pins = <
     23			OMAP5_IOPAD(0x0174, PIN_INPUT_PULLUP | MUX_MODE6) /* timer5_pwm_evt.gpio8_228 */
     24			OMAP5_IOPAD(0x0176, PIN_INPUT_PULLUP | MUX_MODE6) /* timer6_pwm_evt.gpio8_229 */
     25		>;
     26	};
     27};
     28
     29&mmc1 {
     30	pinctrl-names = "default";
     31	pinctrl-0 = <
     32		&mmc1_pins
     33		&mmc1_aux_pins
     34	>;
     35	cd-inverted;
     36	wp-inverted;
     37	cd-gpios = <&gpio8 4 GPIO_ACTIVE_LOW>; /* gpio8_228 */
     38	wp-gpios = <&gpio8 5 GPIO_ACTIVE_LOW>; /* gpio8_229 */
     39};
     40
     41&i2c4 {
     42	pinctrl-names = "default";
     43	pinctrl-0 = <&i2c4_pins>;
     44
     45	clock-frequency = <400000>;
     46
     47	at24@50 {
     48		compatible = "atmel,24c02";
     49		pagesize = <16>;
     50		reg = <0x50>;
     51	};
     52};