cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

orion5x-lacie-d2-network.dts (4980B)


      1/*
      2 * Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
      3 * Copyright (C) 2009 Simon Guinot <sguinot@lacie.com>
      4 *
      5 * This file is licensed under the terms of the GNU General Public
      6 * License version 2. This program is licensed "as is" without any
      7 * warranty of any kind, whether express or implied.
      8 */
      9
     10/dts-v1/;
     11
     12#include <dt-bindings/gpio/gpio.h>
     13#include <dt-bindings/input/input.h>
     14#include <dt-bindings/interrupt-controller/irq.h>
     15#include "orion5x-mv88f5182.dtsi"
     16
     17/ {
     18	model = "LaCie d2 Network";
     19	compatible = "lacie,d2-network", "marvell,orion5x-88f5182", "marvell,orion5x";
     20
     21	memory {
     22		device_type = "memory";
     23		reg = <0x00000000 0x4000000>; /* 64 MB */
     24	};
     25
     26	chosen {
     27		bootargs = "console=ttyS0,115200n8 earlyprintk";
     28		stdout-path = &uart0;
     29	};
     30
     31	soc {
     32		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
     33			 <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
     34			 <MBUS_ID(0x01, 0x0f) 0 0xfff80000 0x80000>;
     35	};
     36
     37	gpio-keys {
     38		compatible = "gpio-keys";
     39		pinctrl-0 = <&pmx_buttons>;
     40		pinctrl-names = "default";
     41		#address-cells = <1>;
     42		#size-cells = <0>;
     43		front_button {
     44			label = "Front Push Button";
     45			linux,code = <KEY_POWER>;
     46			gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
     47		};
     48
     49		power_rocker_sw_on {
     50			label = "Power rocker switch (on|auto)";
     51			linux,input-type = <5>; /* EV_SW */
     52			linux,code = <1>; /* D2NET_SWITCH_POWER_ON */
     53			gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
     54		};
     55
     56		power_rocker_sw_off {
     57			label = "Power rocker switch (auto|off)";
     58			linux,input-type = <5>; /* EV_SW */
     59			linux,code = <2>; /* D2NET_SWITCH_POWER_OFF */
     60			gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
     61		};
     62	};
     63
     64	regulators {
     65		compatible = "simple-bus";
     66		#address-cells = <1>;
     67		#size-cells = <0>;
     68		pinctrl-0 = <&pmx_sata0_power &pmx_sata1_power>;
     69		pinctrl-names = "default";
     70
     71		sata0_power: regulator@0 {
     72			compatible = "regulator-fixed";
     73			reg = <0>;
     74			regulator-name = "SATA0 Power";
     75			regulator-min-microvolt = <5000000>;
     76			regulator-max-microvolt = <5000000>;
     77			enable-active-high;
     78			regulator-always-on;
     79			regulator-boot-on;
     80			gpio = <&gpio0 3 GPIO_ACTIVE_HIGH>;
     81		};
     82
     83		sata1_power: regulator@1 {
     84			compatible = "regulator-fixed";
     85			reg = <1>;
     86			regulator-name = "SATA1 Power";
     87			regulator-min-microvolt = <5000000>;
     88			regulator-max-microvolt = <5000000>;
     89			enable-active-high;
     90			regulator-always-on;
     91			regulator-boot-on;
     92			gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
     93		};
     94	};
     95};
     96
     97&devbus_bootcs {
     98	status = "okay";
     99
    100	devbus,keep-config;
    101
    102	/*
    103	 * Currently the MTD code does not recognize the MX29LV400CBCT
    104	 * as a bottom-type device. This could cause risks of
    105	 * accidentally erasing critical flash sectors. We thus define
    106	 * a single, write-protected partition covering the whole
    107	 * flash.  TODO: once the flash part TOP/BOTTOM detection
    108	 * issue is sorted out in the MTD code, break this into at
    109	 * least three partitions: 'u-boot code', 'u-boot environment'
    110	 * and 'whatever is left'.
    111	 */
    112	flash@0 {
    113		compatible = "cfi-flash";
    114		reg = <0 0x80000>;
    115		bank-width = <1>;
    116                #address-cells = <1>;
    117		#size-cells = <1>;
    118
    119		partition@0 {
    120			label = "Full512Kb";
    121			reg = <0 0x80000>;
    122			read-only;
    123		};
    124	};
    125};
    126
    127&mdio {
    128	status = "okay";
    129
    130	ethphy: ethernet-phy {
    131		reg = <8>;
    132	};
    133};
    134
    135&ehci0 {
    136	status = "okay";
    137};
    138
    139&eth {
    140	status = "okay";
    141
    142	ethernet-port@0 {
    143		phy-handle = <&ethphy>;
    144	};
    145};
    146
    147&i2c {
    148	status = "okay";
    149	clock-frequency = <100000>;
    150	#address-cells = <1>;
    151
    152	rtc@32 {
    153		compatible = "ricoh,rs5c372b";
    154		reg = <0x32>;
    155	};
    156
    157	fan@3e {
    158		compatible = "gmt,g762";
    159		reg = <0x3e>;
    160
    161		/* Not enough HW info */
    162		status = "disabled";
    163	};
    164
    165	eeprom@50 {
    166		compatible = "atmel,24c08";
    167		reg = <0x50>;
    168	};
    169};
    170
    171&pinctrl {
    172	pinctrl-0 = <&pmx_leds &pmx_board_id &pmx_fan_fail>;
    173	pinctrl-names = "default";
    174
    175	pmx_board_id: pmx-board-id {
    176		marvell,pins = "mpp0", "mpp1", "mpp2";
    177		marvell,function = "gpio";
    178	};
    179
    180	pmx_buttons: pmx-buttons {
    181		marvell,pins = "mpp8", "mpp9", "mpp18";
    182		marvell,function = "gpio";
    183	};
    184
    185	pmx_fan_fail: pmx-fan-fail {
    186		marvell,pins = "mpp5";
    187		marvell,function = "gpio";
    188	};
    189
    190	/*
    191	 * MPP6: Red front LED
    192	 * MPP16: Blue front LED blink control
    193	 */
    194	pmx_leds: pmx-leds {
    195		marvell,pins = "mpp6", "mpp16";
    196		marvell,function = "gpio";
    197	};
    198
    199	pmx_sata0_led_active: pmx-sata0-led-active {
    200		marvell,pins = "mpp14";
    201		marvell,function = "sata0";
    202	};
    203
    204	pmx_sata0_power: pmx-sata0-power {
    205		marvell,pins = "mpp3";
    206		marvell,function = "gpio";
    207	};
    208
    209	pmx_sata1_led_active: pmx-sata1-led-active {
    210		marvell,pins = "mpp15";
    211		marvell,function = "sata1";
    212	};
    213
    214	pmx_sata1_power: pmx-sata1-power {
    215		marvell,pins = "mpp12";
    216		marvell,function = "gpio";
    217	};
    218
    219	/*
    220	 * Non MPP GPIOs:
    221	 *  GPIO 22: USB port 1 fuse (0 = Fail, 1 = Ok)
    222	 *  GPIO 23: Blue front LED off
    223	 *  GPIO 24: Inhibit board power off (0 = Disabled, 1 = Enabled)
    224	 */
    225};
    226
    227&sata {
    228	pinctrl-0 = <&pmx_sata0_led_active
    229		     &pmx_sata1_led_active>;
    230	pinctrl-names = "default";
    231	status = "okay";
    232	nr-ports = <2>;
    233};
    234
    235&uart0 {
    236	status = "okay";
    237};