orion5x-maxtor-shared-storage-2.dts (3673B)
1/* 2 * Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 3 * Copyright (C) Sylver Bruneau <sylver.bruneau@googlemail.com> 4 * 5 * This file is licensed under the terms of the GNU General Public 6 * License version 2. This program is licensed "as is" without any 7 * warranty of any kind, whether express or implied. 8 */ 9 10/dts-v1/; 11 12#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/input/input.h> 14#include <dt-bindings/interrupt-controller/irq.h> 15#include "orion5x-mv88f5182.dtsi" 16 17/ { 18 model = "Maxtor Shared Storage II"; 19 compatible = "maxtor,shared-storage-2", "marvell,orion5x-88f5182", "marvell,orion5x"; 20 21 memory { 22 device_type = "memory"; 23 reg = <0x00000000 0x4000000>; /* 64 MB */ 24 }; 25 26 chosen { 27 bootargs = "console=ttyS0,115200n8 earlyprintk"; 28 stdout-path = &uart0; 29 }; 30 31 soc { 32 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>, 33 <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>, 34 <MBUS_ID(0x01, 0x0f) 0 0xff800000 0x40000>; 35 }; 36 37 gpio-keys { 38 compatible = "gpio-keys"; 39 pinctrl-0 = <&pmx_buttons>; 40 pinctrl-names = "default"; 41 #address-cells = <1>; 42 #size-cells = <0>; 43 power { 44 label = "Power"; 45 linux,code = <KEY_POWER>; 46 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>; 47 }; 48 49 reset { 50 label = "Reset"; 51 linux,code = <KEY_RESTART>; 52 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; 53 }; 54 }; 55}; 56 57&devbus_bootcs { 58 status = "okay"; 59 60 devbus,keep-config; 61 62 /* 63 * Currently the MTD code does not recognize the MX29LV400CBCT 64 * as a bottom-type device. This could cause risks of 65 * accidentally erasing critical flash sectors. We thus define 66 * a single, write-protected partition covering the whole 67 * flash. TODO: once the flash part TOP/BOTTOM detection 68 * issue is sorted out in the MTD code, break this into at 69 * least three partitions: 'u-boot code', 'u-boot environment' 70 * and 'whatever is left'. 71 */ 72 flash@0 { 73 compatible = "cfi-flash"; 74 reg = <0 0x40000>; 75 bank-width = <1>; 76 #address-cells = <1>; 77 #size-cells = <1>; 78 }; 79}; 80 81&mdio { 82 status = "okay"; 83 84 ethphy: ethernet-phy { 85 reg = <8>; 86 }; 87}; 88 89&ehci0 { 90 status = "okay"; 91}; 92 93ð { 94 status = "okay"; 95 96 ethernet-port@0 { 97 phy-handle = <ðphy>; 98 }; 99}; 100 101&i2c { 102 status = "okay"; 103 clock-frequency = <100000>; 104 #address-cells = <1>; 105 106 rtc@68 { 107 compatible = "st,m41t81"; 108 reg = <0x68>; 109 pinctrl-0 = <&pmx_rtc>; 110 pinctrl-names = "default"; 111 interrupt-parent = <&gpio0>; 112 interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 113 }; 114}; 115 116&pinctrl { 117 pinctrl-0 = <&pmx_leds &pmx_misc>; 118 pinctrl-names = "default"; 119 120 pmx_buttons: pmx-buttons { 121 marvell,pins = "mpp11", "mpp12"; 122 marvell,function = "gpio"; 123 }; 124 125 /* 126 * MPP0: Power LED 127 * MPP1: Error LED 128 */ 129 pmx_leds: pmx-leds { 130 marvell,pins = "mpp0", "mpp1"; 131 marvell,function = "gpio"; 132 }; 133 134 /* 135 * MPP4: HDD ind. (Single/Dual) 136 * MPP5: HD0 5V control 137 * MPP6: HD0 12V control 138 * MPP7: HD1 5V control 139 * MPP8: HD1 12V control 140 */ 141 pmx_misc: pmx-misc { 142 marvell,pins = "mpp4", "mpp5", "mpp6", "mpp7", "mpp8", "mpp10"; 143 marvell,function = "gpio"; 144 }; 145 146 pmx_rtc: pmx-rtc { 147 marvell,pins = "mpp3"; 148 marvell,function = "gpio"; 149 }; 150 151 pmx_sata0_led_active: pmx-sata0-led-active { 152 marvell,pins = "mpp14"; 153 marvell,function = "sata0"; 154 }; 155 156 pmx_sata1_led_active: pmx-sata1-led-active { 157 marvell,pins = "mpp15"; 158 marvell,function = "sata1"; 159 }; 160 161 /* 162 * Non MPP GPIOs: 163 * GPIO 22: USB port 1 fuse (0 = Fail, 1 = Ok) 164 * GPIO 23: Blue front LED off 165 * GPIO 24: Inhibit board power off (0 = Disabled, 1 = Enabled) 166 */ 167}; 168 169&sata { 170 pinctrl-0 = <&pmx_sata0_led_active 171 &pmx_sata1_led_active>; 172 pinctrl-names = "default"; 173 status = "okay"; 174 nr-ports = <2>; 175}; 176 177&uart0 { 178 status = "okay"; 179};