cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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orion5x-mv88f5181.dtsi (1093B)

      1/*
      2 * Copyright (C) 2016 Jamie Lentin <jm@lentin.co.uk>
      3 *
      4 * This file is licensed under the terms of the GNU General Public
      5 * License version 2. This program is licensed "as is" without any
      6 * warranty of any kind, whether express or implied.
      7 */
      8
      9#include "orion5x.dtsi"
     10
     11/ {
     12	compatible = "marvell,orion5x-88f5181", "marvell,orion5x";
     13
     14	soc {
     15		compatible = "marvell,orion5x-88f5181-mbus", "simple-bus";
     16
     17		internal-regs {
     18			pinctrl: pinctrl@10000 {
     19				compatible = "marvell,88f5181-pinctrl";
     20				reg = <0x10000 0x8>, <0x10050 0x4>;
     21			};
     22
     23			core_clk: core-clocks@10030 {
     24				compatible = "marvell,mv88f5181-core-clock";
     25				reg = <0x10010 0x4>;
     26				#clock-cells = <1>;
     27			};
     28
     29			mbusc: mbus-controller@20000 {
     30				compatible = "marvell,mbus-controller";
     31				reg = <0x20000 0x100>, <0x1500 0x20>;
     32			};
     33		};
     34	};
     35};
     36
     37&pinctrl {
     38	pmx_ge: pmx-ge {
     39		marvell,pins = "mpp8", "mpp9", "mpp10", "mpp11",
     40			       "mpp12", "mpp13", "mpp14", "mpp15",
     41			       "mpp16", "mpp17", "mpp18", "mpp19";
     42		marvell,function = "ge";
     43	};
     44};
     45
     46&eth {
     47	pinctrl-0 = <&pmx_ge>;
     48	pinctrl-names = "default";
     49};