cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

orion5x-rd88f5182-nas.dts (3340B)

      1/*
      2 * Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
      3 *
      4 * This file is licensed under the terms of the GNU General Public
      5 * License version 2. This program is licensed "as is" without any
      6 * warranty of any kind, whether express or implied.
      7 */
      8
      9/dts-v1/;
     10
     11#include <dt-bindings/gpio/gpio.h>
     12#include "orion5x-mv88f5182.dtsi"
     13
     14/ {
     15	model = "Marvell Reference Design 88F5182 NAS";
     16	compatible = "marvell,rd-88f5182-nas", "marvell,orion5x-88f5182", "marvell,orion5x";
     17
     18	memory {
     19		device_type = "memory";
     20		reg = <0x00000000 0x4000000>; /* 64 MB */
     21	};
     22
     23	chosen {
     24		bootargs = "console=ttyS0,115200n8 earlyprintk";
     25		stdout-path = &uart0;
     26	};
     27
     28	soc {
     29		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
     30		         <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
     31			 <MBUS_ID(0x01, 0x0f) 0 0xf4000000 0x80000>,
     32			 <MBUS_ID(0x01, 0x1d) 0 0xfc000000 0x1000000>;
     33	};
     34
     35	gpio-leds {
     36		compatible = "gpio-leds";
     37		pinctrl-0 = <&pmx_debug_led>;
     38		pinctrl-names = "default";
     39
     40		led@0 {
     41			label = "rd88f5182:cpu";
     42			linux,default-trigger = "heartbeat";
     43			gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
     44		};
     45	};
     46};
     47
     48&devbus_bootcs {
     49	status = "okay";
     50
     51	/* Read parameters */
     52	devbus,bus-width    = <8>;
     53	devbus,turn-off-ps  = <90000>;
     54	devbus,badr-skew-ps = <0>;
     55	devbus,acc-first-ps = <186000>;
     56	devbus,acc-next-ps  = <186000>;
     57
     58	/* Write parameters */
     59	devbus,wr-high-ps  = <90000>;
     60	devbus,wr-low-ps   = <90000>;
     61	devbus,ale-wr-ps   = <90000>;
     62
     63	flash@0 {
     64		compatible = "cfi-flash";
     65		reg = <0 0x80000>;
     66		bank-width = <1>;
     67	};
     68};
     69
     70&devbus_cs1 {
     71	status = "okay";
     72
     73	/* Read parameters */
     74	devbus,bus-width    = <8>;
     75	devbus,turn-off-ps  = <90000>;
     76	devbus,badr-skew-ps = <0>;
     77	devbus,acc-first-ps = <186000>;
     78	devbus,acc-next-ps  = <186000>;
     79
     80	/* Write parameters */
     81	devbus,wr-high-ps  = <90000>;
     82	devbus,wr-low-ps   = <90000>;
     83	devbus,ale-wr-ps   = <90000>;
     84
     85	flash@0 {
     86		compatible = "cfi-flash";
     87		reg = <0 0x1000000>;
     88		bank-width = <1>;
     89	};
     90};
     91
     92&ehci0 {
     93	status = "okay";
     94};
     95
     96&ehci1 {
     97	status = "okay";
     98};
     99
    100&eth {
    101	status = "okay";
    102
    103	ethernet-port@0 {
    104		phy-handle = <&ethphy>;
    105	};
    106};
    107
    108&i2c {
    109	status = "okay";
    110	clock-frequency = <100000>;
    111	#address-cells = <1>;
    112
    113	rtc@68 {
    114		pinctrl-0 = <&pmx_rtc>;
    115		pinctrl-names = "default";
    116		compatible = "dallas,ds1338";
    117		reg = <0x68>;
    118	};
    119};
    120
    121&mdio {
    122	status = "okay";
    123
    124	ethphy: ethernet-phy {
    125		reg = <8>;
    126	};
    127};
    128
    129&pinctrl {
    130	pinctrl-0 = <&pmx_reset_switch &pmx_misc_gpios
    131		&pmx_pci_gpios>;
    132	pinctrl-names = "default";
    133
    134	/*
    135	 * MPP[20] PCI Clock to MV88F5182
    136	 * MPP[21] PCI Clock to mini PCI CON11
    137	 * MPP[22] USB 0 over current indication
    138	 * MPP[23] USB 1 over current indication
    139	 * MPP[24] USB 1 over current enable
    140	 * MPP[25] USB 0 over current enable
    141	 */
    142
    143	pmx_debug_led: pmx-debug_led {
    144		marvell,pins = "mpp0";
    145		marvell,function = "gpio";
    146	};
    147
    148	pmx_reset_switch: pmx-reset-switch {
    149		marvell,pins = "mpp1";
    150		marvell,function = "gpio";
    151	};
    152
    153	pmx_rtc: pmx-rtc {
    154		marvell,pins = "mpp3";
    155		marvell,function = "gpio";
    156	};
    157
    158	pmx_misc_gpios: pmx-misc-gpios {
    159		marvell,pins = "mpp4", "mpp5";
    160		marvell,function = "gpio";
    161	};
    162
    163	pmx_pci_gpios: pmx-pci-gpios {
    164		marvell,pins = "mpp6", "mpp7";
    165		marvell,function = "gpio";
    166	};
    167};
    168
    169&sata {
    170	pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
    171	pinctrl-names = "default";
    172	status = "okay";
    173	nr-ports = <2>;
    174};
    175
    176&uart0 {
    177	status = "okay";
    178};