cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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qcom-ipq4018-jalapeno.dts (3147B)

      1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
      2// Copyright (c) 2018, Robert Marko <robimarko@gmail.com>
      3
      4#include "qcom-ipq4019.dtsi"
      5#include <dt-bindings/gpio/gpio.h>
      6#include <dt-bindings/input/input.h>
      7
      8/ {
      9	model = "8devices Jalapeno";
     10	compatible = "8dev,jalapeno";
     11};
     12
     13&tlmm {
     14	mdio_pins: mdio_pinmux {
     15		pinmux_1 {
     16			pins = "gpio53";
     17			function = "mdio";
     18		};
     19
     20		pinmux_2 {
     21			pins = "gpio52";
     22			function = "mdc";
     23		};
     24
     25		pinconf {
     26			pins = "gpio52", "gpio53";
     27			bias-pull-up;
     28		};
     29	};
     30
     31	serial_pins: serial_pinmux {
     32		mux {
     33			pins = "gpio60", "gpio61";
     34			function = "blsp_uart0";
     35			bias-disable;
     36		};
     37	};
     38
     39	spi_0_pins: spi_0_pinmux {
     40		pin {
     41			function = "blsp_spi0";
     42			pins = "gpio55", "gpio56", "gpio57";
     43			drive-strength = <2>;
     44			bias-disable;
     45		};
     46
     47		pin_cs {
     48			function = "gpio";
     49			pins = "gpio54", "gpio59";
     50			drive-strength = <2>;
     51			bias-disable;
     52			output-high;
     53		};
     54	};
     55};
     56
     57&watchdog {
     58	status = "okay";
     59};
     60
     61&prng {
     62	status = "okay";
     63};
     64
     65&blsp_dma {
     66	status = "okay";
     67};
     68
     69&blsp1_spi1 {
     70	status = "okay";
     71
     72	pinctrl-0 = <&spi_0_pins>;
     73	pinctrl-names = "default";
     74	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
     75
     76	flash@0 {
     77		status = "okay";
     78
     79		compatible = "jedec,spi-nor";
     80		reg = <0>;
     81		spi-max-frequency = <24000000>;
     82
     83		partitions {
     84			compatible = "fixed-partitions";
     85			#address-cells = <1>;
     86			#size-cells = <1>;
     87
     88			partition@0 {
     89				label = "SBL1";
     90				reg = <0x00000000 0x00040000>;
     91				read-only;
     92			};
     93
     94			partition@40000 {
     95				label = "MIBIB";
     96				reg = <0x00040000 0x00020000>;
     97				read-only;
     98			};
     99
    100			partition@60000 {
    101				label = "QSEE";
    102				reg = <0x00060000 0x00060000>;
    103				read-only;
    104			};
    105
    106			partition@c0000 {
    107				label = "CDT";
    108				reg = <0x000c0000 0x00010000>;
    109				read-only;
    110			};
    111
    112			partition@d0000 {
    113				label = "DDRPARAMS";
    114				reg = <0x000d0000 0x00010000>;
    115				read-only;
    116			};
    117
    118			partition@e0000 {
    119				label = "u-boot-env";
    120				reg = <0x000e0000 0x00010000>;
    121			};
    122
    123			partition@f0000 {
    124				label = "u-boot";
    125				reg = <0x000f0000 0x00080000>;
    126				read-only;
    127			};
    128
    129			partition@170000 {
    130				label = "ART";
    131				reg = <0x00170000 0x00010000>;
    132				read-only;
    133			};
    134		};
    135	};
    136
    137	spi-nand@1 {
    138		status = "okay";
    139
    140		compatible = "spi-nand";
    141		reg = <1>;
    142		spi-max-frequency = <24000000>;
    143
    144		partitions {
    145			compatible = "fixed-partitions";
    146			#address-cells = <1>;
    147			#size-cells = <1>;
    148
    149			partition@0 {
    150				label = "ubi1";
    151				reg = <0x00000000 0x04000000>;
    152			};
    153
    154			partition@4000000 {
    155				label = "ubi2";
    156				reg = <0x04000000 0x04000000>;
    157			};
    158		};
    159	};
    160};
    161
    162&blsp1_uart1 {
    163	status = "okay";
    164
    165	pinctrl-0 = <&serial_pins>;
    166	pinctrl-names = "default";
    167};
    168
    169&cryptobam {
    170	status = "okay";
    171};
    172
    173&crypto {
    174	status = "okay";
    175};
    176
    177&mdio {
    178	status = "okay";
    179
    180	pinctrl-0 = <&mdio_pins>;
    181	pinctrl-names = "default";
    182};
    183
    184&wifi0 {
    185	status = "okay";
    186
    187	qcom,ath10k-calibration-variant = "8devices-Jalapeno";
    188};
    189
    190&wifi1 {
    191	status = "okay";
    192
    193	qcom,ath10k-calibration-variant = "8devices-Jalapeno";
    194};
    195
    196&usb3_ss_phy {
    197	status = "okay";
    198};
    199
    200&usb3_hs_phy {
    201	status = "okay";
    202};
    203
    204&usb3 {
    205	status = "okay";
    206};
    207
    208&usb2_hs_phy {
    209	status = "okay";
    210};
    211
    212&usb2 {
    213	status = "okay";
    214};