cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

qcom-ipq4019-ap.dk01.1.dtsi (2323B)

      1/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
      2 *
      3 * Permission to use, copy, modify, and/or distribute this software for any
      4 * purpose with or without fee is hereby granted, provided that the above
      5 * copyright notice and this permission notice appear in all copies.
      6 *
      7 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
      8 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
      9 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     10 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     11 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
     12 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
     13 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     14 *
     15 */
     16
     17#include "qcom-ipq4019.dtsi"
     18
     19/ {
     20	model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK01.1";
     21
     22	aliases {
     23		serial0 = &blsp1_uart1;
     24	};
     25
     26	chosen {
     27		stdout-path = "serial0:115200n8";
     28	};
     29
     30	soc {
     31		rng@22000 {
     32			status = "okay";
     33		};
     34
     35		pinctrl@1000000 {
     36			serial_pins: serial_pinmux {
     37				mux {
     38					pins = "gpio60", "gpio61";
     39					function = "blsp_uart0";
     40					bias-disable;
     41				};
     42			};
     43
     44			spi_0_pins: spi_0_pinmux {
     45				pinmux {
     46					function = "blsp_spi0";
     47					pins = "gpio55", "gpio56", "gpio57";
     48				};
     49				pinmux_cs {
     50					function = "gpio";
     51					pins = "gpio54";
     52				};
     53				pinconf {
     54					pins = "gpio55", "gpio56", "gpio57";
     55					drive-strength = <12>;
     56					bias-disable;
     57				};
     58				pinconf_cs {
     59					pins = "gpio54";
     60					drive-strength = <2>;
     61					bias-disable;
     62					output-high;
     63				};
     64			};
     65		};
     66
     67		blsp_dma: dma-controller@7884000 {
     68			status = "okay";
     69		};
     70
     71		spi@78b5000 {
     72			pinctrl-0 = <&spi_0_pins>;
     73			pinctrl-names = "default";
     74			status = "okay";
     75			cs-gpios = <&tlmm 54 0>;
     76
     77			mx25l25635e@0 {
     78				#address-cells = <1>;
     79				#size-cells = <1>;
     80				reg = <0>;
     81				compatible = "mx25l25635e";
     82				spi-max-frequency = <24000000>;
     83			};
     84		};
     85
     86		serial@78af000 {
     87			pinctrl-0 = <&serial_pins>;
     88			pinctrl-names = "default";
     89			status = "okay";
     90		};
     91
     92		cryptobam: dma-controller@8e04000 {
     93			status = "okay";
     94		};
     95
     96		crypto@8e3a000 {
     97			status = "okay";
     98		};
     99
    100		watchdog@b017000 {
    101			status = "okay";
    102		};
    103
    104		wifi@a000000 {
    105			status = "okay";
    106		};
    107
    108		wifi@a800000 {
    109			status = "okay";
    110		};
    111	};
    112};