cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

qcom-mdm9615-wp8548-mangoh-green.dts (7042B)


      1/*
      2 * Device Tree Source for mangOH Green Board with WP8548 Module
      3 *
      4 * Copyright (C) 2016 BayLibre, SAS.
      5 * Author : Neil Armstrong <narmstrong@baylibre.com>
      6 *
      7 * This file is dual-licensed: you can use it either under the terms
      8 * of the GPL or the X11 license, at your option. Note that this dual
      9 * licensing only applies to this file, and not this project as a
     10 * whole.
     11 *
     12 *  a) This file is free software; you can redistribute it and/or
     13 *     modify it under the terms of the GNU General Public License as
     14 *     published by the Free Software Foundation; either version 2 of the
     15 *     License, or (at your option) any later version.
     16 *
     17 *     This file is distributed in the hope that it will be useful,
     18 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
     19 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     20 *     GNU General Public License for more details.
     21 *
     22 * Or, alternatively,
     23 *
     24 *  b) Permission is hereby granted, free of charge, to any person
     25 *     obtaining a copy of this software and associated documentation
     26 *     files (the "Software"), to deal in the Software without
     27 *     restriction, including without limitation the rights to use,
     28 *     copy, modify, merge, publish, distribute, sublicense, and/or
     29 *     sell copies of the Software, and to permit persons to whom the
     30 *     Software is furnished to do so, subject to the following
     31 *     conditions:
     32 *
     33 *     The above copyright notice and this permission notice shall be
     34 *     included in all copies or substantial portions of the Software.
     35 *
     36 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     37 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     38 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     39 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
     40 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     41 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     42 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     43 *     OTHER DEALINGS IN THE SOFTWARE.
     44 */
     45
     46#include <dt-bindings/input/input.h>
     47
     48#include "qcom-mdm9615-wp8548.dtsi"
     49#include <dt-bindings/interrupt-controller/irq.h>
     50#include <dt-bindings/gpio/gpio.h>
     51
     52/ {
     53	model = "MangOH Green with WP8548 Module";
     54	compatible = "swir,mangoh-green-wp8548", "swir,wp8548", "qcom,mdm9615";
     55
     56	aliases {
     57		spi0 = &gsbi3_spi;
     58		serial0 = &gsbi4_serial;
     59		serial1 = &gsbi5_serial;
     60		i2c0 = &gsbi5_i2c;
     61		mmc0 = &sdcc1;
     62	};
     63
     64	chosen {
     65		stdout-path = "serial1:115200n8";
     66	};
     67};
     68
     69&msmgpio {
     70	/* MangOH GPIO Mapping :
     71	 * - 2 : GPIOEXP_INT2
     72	 * - 7 : IOT1_GPIO2
     73	 * - 8 : IOT0_GPIO4
     74	 * - 13: IOT0_GPIO3
     75	 * - 21: IOT1_GPIO4
     76	 * - 22: IOT2_GPIO1
     77	 * - 23: IOT2_GPIO2
     78	 * - 24: IOT2_GPIO3
     79	 * - 25: IOT1_GPIO1
     80	 * - 32: IOT1_GPIO3
     81	 * - 33: IOT0_GPIO2
     82	 * - 42: IOT0_GPIO1 and SD Card Detect
     83	 */
     84
     85	gpioext1_pins: gpioext1_pins {
     86		pins {
     87			pins = "gpio2";
     88			function = "gpio";
     89			input-enable;
     90			bias-disable;
     91		};
     92	};
     93
     94	sdc_cd_pins: sdc_cd_pins {
     95		pins {
     96			pins = "gpio42";
     97			function = "gpio";
     98			drive-strength = <2>;
     99			bias-pull-up;
    100		};
    101	};
    102};
    103
    104&gsbi3_spi {
    105	spi@0 {
    106		compatible = "swir,mangoh-iotport-spi";
    107		spi-max-frequency = <24000000>;
    108		reg = <0>;
    109	};
    110};
    111
    112&gsbi5_i2c {
    113	mux@71 {
    114		compatible = "nxp,pca9548";
    115		#address-cells = <1>;
    116		#size-cells = <0>;
    117		reg = <0x71>;
    118
    119		i2c_iot0: i2c@0 {
    120			#address-cells = <1>;
    121			#size-cells = <0>;
    122			reg = <0>;
    123		};
    124
    125		i2c_iot1: i2c@1 {
    126			#address-cells = <1>;
    127			#size-cells = <0>;
    128			reg = <1>;
    129		};
    130
    131		i2c_iot2: i2c@2 {
    132			#address-cells = <1>;
    133			#size-cells = <0>;
    134			reg = <2>;
    135		};
    136
    137		i2c@3 {
    138			#address-cells = <1>;
    139			#size-cells = <0>;
    140			reg = <3>;
    141
    142			usbhub: hub@8 {
    143				compatible = "smsc,usb3503a";
    144				reg = <0x8>;
    145				connect-gpios = <&gpioext2 1 GPIO_ACTIVE_HIGH>;
    146				intn-gpios = <&gpioext2 0 GPIO_ACTIVE_HIGH>;
    147				initial-mode = <1>;
    148			};
    149		};
    150
    151		i2c@4 {
    152			#address-cells = <1>;
    153			#size-cells = <0>;
    154			reg = <4>;
    155
    156			gpioext0: gpio@3e {
    157				/* GPIO Expander 0 Mapping :
    158				 * - 0: ARDUINO_RESET_Level shift
    159				 * - 1: BattChrgr_PG_N
    160				 * - 2: BattGauge_GPIO
    161				 * - 3: LED_ON (out active high)
    162				 * - 4: ATmega_reset_GPIO
    163				 * - 5: X
    164				 * - 6: PCM_ANALOG_SELECT (out active high)
    165				 * - 7: X
    166				 * - 8: Board_rev_res1 (in)
    167				 * - 9: Board_rev_res2 (in)
    168				 * - 10: UART_EXP1_ENn (out active low / pull-down)
    169				 * - 11: UART_EXP1_IN (out pull-down)
    170				 * - 12: UART_EXP2_IN (out pull-down)
    171				 * - 13: SDIO_SEL (out pull-down)
    172				 * - 14: SPI_EXP1_ENn (out active low / pull-down)
    173				 * - 15: SPI_EXP1_IN (out pull-down)
    174				 */
    175				#gpio-cells = <2>;
    176				#interrupt-cells = <2>;
    177				compatible = "semtech,sx1509q";
    178				reg = <0x3e>;
    179				interrupt-parent = <&gpioext1>;
    180				interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
    181
    182				probe-reset;
    183
    184				gpio-controller;
    185				interrupt-controller;
    186			};
    187		};
    188
    189		i2c@5 {
    190			#address-cells = <1>;
    191			#size-cells = <0>;
    192			reg = <5>;
    193
    194			gpioext1: gpio@3f {
    195				/* GPIO Expander 1 Mapping :
    196				 * - 0: GPIOEXP_INT1
    197				 * - 1: Battery detect
    198				 * - 2: GPIO_SCF3_RESET
    199				 * - 3: LED_CARD_DETECT_IOT0 (in)
    200				 * - 4: LED_CARD_DETECT_IOT1 (in)
    201				 * - 5: LED_CARD_DETECT_IOT2 (in)
    202				 * - 6: UIM2_PWM_SELECT
    203				 * - 7: UIM2_M2_S_SELECT
    204				 * - 8: TP900
    205				 * - 9: SENSOR_INT1 (in)
    206				 * - 10: SENSOR_INT2 (in)
    207				 * - 11: CARD_DETECT_IOT0 (in pull-up)
    208				 * - 12: CARD_DETECT_IOT2 (in pull-up)
    209				 * - 13: CARD_DETECT_IOT1 (in pull-up)
    210				 * - 14: GPIOEXP_INT3 (in active low / pull-up)
    211				 * - 15: BattChrgr_INT_N
    212				 */
    213				pinctrl-0 = <&gpioext1_pins>;
    214				pinctrl-names = "default";
    215
    216				#gpio-cells = <2>;
    217				#interrupt-cells = <2>;
    218				compatible = "semtech,sx1509q";
    219				reg = <0x3f>;
    220				interrupt-parent = <&msmgpio>;
    221				interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
    222
    223				probe-reset;
    224
    225				gpio-controller;
    226				interrupt-controller;
    227			};
    228		};
    229
    230		i2c@6 {
    231			#address-cells = <1>;
    232			#size-cells = <0>;
    233			reg = <6>;
    234
    235			gpioext2: gpio@70 {
    236				/* GPIO Expander 2 Mapping :
    237				 * - 0: USB_HUB_INTn
    238				 * - 1: HUB_CONNECT
    239				 * - 2: GPIO_IOT2_RESET (out active low / pull-up)
    240				 * - 3: GPIO_IOT1_RESET (out active low / pull-up)
    241				 * - 4: GPIO_IOT0_RESET (out active low / pull-up)
    242				 * - 5: TP901
    243				 * - 6: TP902
    244				 * - 7: TP903
    245				 * - 8: UART_EXP2_ENn (out active low / pull-down)
    246				 * - 9: PCM_EXP1_ENn (out active low)
    247				 * - 10: PCM_EXP1_SEL (out)
    248				 * - 11: ARD_FTDI
    249				 * - 12: TP904
    250				 * - 13: TP905
    251				 * - 14: TP906
    252				 * - 15: RS232_Enable (out active high / pull-up)
    253				 */
    254				#gpio-cells = <2>;
    255				#interrupt-cells = <2>;
    256				compatible = "semtech,sx1509q";
    257				reg = <0x70>;
    258				interrupt-parent = <&gpioext1>;
    259				interrupts = <14 IRQ_TYPE_EDGE_FALLING>;
    260
    261				probe-reset;
    262
    263				gpio-controller;
    264				interrupt-controller;
    265			};
    266		};
    267
    268		i2c@7 {
    269			#address-cells = <1>;
    270			#size-cells = <0>;
    271			reg = <7>;
    272		};
    273	};
    274};
    275
    276&sdcc1 {
    277	pinctrl-0 = <&sdc_cd_pins>;
    278	pinctrl-names = "default";
    279	disable-wp;
    280	cd-gpios = <&msmgpio 42 GPIO_ACTIVE_LOW>; /* Active low CD */
    281};