cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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qcom-pmx55.dtsi (1752B)

      1// SPDX-License-Identifier: BSD-3-Clause
      2
      3/*
      4 * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
      5 * Copyright (c) 2020, Linaro Limited
      6 */
      7
      8#include <dt-bindings/iio/qcom,spmi-vadc.h>
      9#include <dt-bindings/interrupt-controller/irq.h>
     10#include <dt-bindings/spmi/spmi.h>
     11
     12&spmi_bus {
     13	pmic@8 {
     14		compatible = "qcom,pmx55", "qcom,spmi-pmic";
     15		reg = <0x8 SPMI_USID>;
     16		#address-cells = <1>;
     17		#size-cells = <0>;
     18
     19		power-on@800 {
     20			compatible = "qcom,pm8916-pon";
     21			reg = <0x0800>;
     22
     23			status = "disabled";
     24		};
     25
     26		pmx55_temp: temp-alarm@2400 {
     27			compatible = "qcom,spmi-temp-alarm";
     28			reg = <0x2400>;
     29			interrupts = <0x8 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
     30			io-channels = <&pmx55_adc ADC5_DIE_TEMP>;
     31			io-channel-names = "thermal";
     32			#thermal-sensor-cells = <0>;
     33		};
     34
     35		pmx55_adc: adc@3100 {
     36			compatible = "qcom,spmi-adc5";
     37			reg = <0x3100>;
     38			#address-cells = <1>;
     39			#size-cells = <0>;
     40			#io-channel-cells = <1>;
     41			interrupts = <0x8 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
     42
     43			ref-gnd@0 {
     44				reg = <ADC5_REF_GND>;
     45				qcom,pre-scaling = <1 1>;
     46				label = "ref_gnd";
     47			};
     48
     49			vref-1p25@1 {
     50				reg = <ADC5_1P25VREF>;
     51				qcom,pre-scaling = <1 1>;
     52				label = "vref_1p25";
     53			};
     54
     55			die-temp@6 {
     56				reg = <ADC5_DIE_TEMP>;
     57				qcom,pre-scaling = <1 1>;
     58				label = "die_temp";
     59			};
     60
     61			chg-temp@9 {
     62				reg = <ADC5_CHG_TEMP>;
     63				qcom,pre-scaling = <1 1>;
     64				label = "chg_temp";
     65			};
     66		};
     67
     68		pmx55_gpios: gpio@c000 {
     69			compatible = "qcom,pmx55-gpio", "qcom,spmi-gpio";
     70			reg = <0xc000>;
     71			gpio-controller;
     72			#gpio-cells = <2>;
     73			interrupt-controller;
     74			#interrupt-cells = <2>;
     75		};
     76	};
     77
     78	pmic@9 {
     79		compatible = "qcom,pmx55", "qcom,spmi-pmic";
     80		reg = <0x9 SPMI_USID>;
     81		#address-cells = <1>;
     82		#size-cells = <0>;
     83	};
     84};