cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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qcom-sdx55-telit-fn980-tlb.dts (7175B)


      1// SPDX-License-Identifier: BSD-3-Clause
      2/*
      3 * Copyright (c) 2021, Linaro Ltd.
      4 */
      5
      6/dts-v1/;
      7
      8#include <dt-bindings/gpio/gpio.h>
      9#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
     10#include "qcom-sdx55.dtsi"
     11#include "qcom-pmx55.dtsi"
     12
     13/ {
     14	model = "Telit FN980 TLB";
     15	compatible = "qcom,sdx55-telit-fn980-tlb", "qcom,sdx55";
     16	qcom,board-id = <0xb010008 0x0>;
     17
     18	aliases {
     19		serial0 = &blsp1_uart3;
     20	};
     21
     22	chosen {
     23		stdout-path = "serial0:921600n8";
     24	};
     25
     26	reserved-memory {
     27		#address-cells = <1>;
     28		#size-cells = <1>;
     29		ranges;
     30
     31		mpss_debug_mem: memory@8ef00000 {
     32			no-map;
     33			reg = <0x8ef00000 0x800000>;
     34		};
     35
     36		ipa_fw_mem: memory@8fced000 {
     37			no-map;
     38			reg = <0x8fced000 0x10000>;
     39		};
     40
     41		mpss_adsp_mem: memory@90800000 {
     42			no-map;
     43			reg = <0x90800000 0xf800000>;
     44		};
     45	};
     46
     47	vph_pwr: vph-pwr-regulator {
     48		compatible = "regulator-fixed";
     49		regulator-name = "vph_pwr";
     50		regulator-min-microvolt = <3700000>;
     51		regulator-max-microvolt = <3700000>;
     52	};
     53
     54	vreg_bob_3p3: pmx55-bob {
     55		compatible = "regulator-fixed";
     56		regulator-name = "vreg_bob_3p3";
     57		regulator-min-microvolt = <3300000>;
     58		regulator-max-microvolt = <3300000>;
     59
     60		regulator-always-on;
     61		regulator-boot-on;
     62
     63		vin-supply = <&vph_pwr>;
     64	};
     65
     66	vreg_s7e_mx_0p752: pmx55-s7e {
     67		compatible = "regulator-fixed";
     68		regulator-name = "vreg_s7e_mx_0p752";
     69		regulator-min-microvolt = <752000>;
     70		regulator-max-microvolt = <752000>;
     71
     72		vin-supply = <&vph_pwr>;
     73	};
     74
     75	vreg_sd_vdd: sd-vdd {
     76		compatible = "regulator-fixed";
     77		regulator-name = "vreg_sd_vdd";
     78		regulator-min-microvolt = <2950000>;
     79		regulator-max-microvolt = <2950000>;
     80
     81		vin-supply = <&vreg_vddpx_2>;
     82	};
     83
     84	vreg_vddpx_2: vddpx-2 {
     85		compatible = "regulator-gpio";
     86		regulator-name = "vreg_vddpx_2";
     87		regulator-min-microvolt = <1800000>;
     88		regulator-max-microvolt = <2850000>;
     89		enable-gpios = <&tlmm 98 GPIO_ACTIVE_HIGH>;
     90		gpios = <&tlmm 100 GPIO_ACTIVE_HIGH>;
     91		states = <1800000 0>, <2850000 1>;
     92		startup-delay-us = <200000>;
     93		enable-active-high;
     94		regulator-boot-on;
     95
     96		vin-supply = <&vph_pwr>;
     97	};
     98};
     99
    100&apps_rsc {
    101	pmx55-rpmh-regulators {
    102		compatible = "qcom,pmx55-rpmh-regulators";
    103		qcom,pmic-id = "e";
    104
    105		vdd-s1-supply = <&vph_pwr>;
    106		vdd-s2-supply = <&vph_pwr>;
    107		vdd-s3-supply = <&vph_pwr>;
    108		vdd-s4-supply = <&vph_pwr>;
    109		vdd-s5-supply = <&vph_pwr>;
    110		vdd-s6-supply = <&vph_pwr>;
    111		vdd-s7-supply = <&vph_pwr>;
    112		vdd-l1-l2-supply = <&vreg_s2e_1p224>;
    113		vdd-l3-l9-supply = <&vreg_s3e_0p824>;
    114		vdd-l4-l12-supply = <&vreg_s4e_1p904>;
    115		vdd-l5-l6-supply = <&vreg_s4e_1p904>;
    116		vdd-l7-l8-supply = <&vreg_s3e_0p824>;
    117		vdd-l10-l11-l13-supply = <&vreg_bob_3p3>;
    118		vdd-l14-supply = <&vreg_s7e_mx_0p752>;
    119		vdd-l15-supply = <&vreg_s2e_1p224>;
    120		vdd-l16-supply = <&vreg_s4e_1p904>;
    121
    122		vreg_s2e_1p224: smps2 {
    123			regulator-min-microvolt = <1280000>;
    124			regulator-max-microvolt = <1400000>;
    125		};
    126
    127		vreg_s3e_0p824: smps3 {
    128			regulator-min-microvolt = <800000>;
    129			regulator-max-microvolt = <1000000>;
    130		};
    131
    132		vreg_s4e_1p904: smps4 {
    133			regulator-min-microvolt = <1800000>;
    134			regulator-max-microvolt = <1960000>;
    135		};
    136
    137		vreg_l1e_bb_1p2: ldo1 {
    138			regulator-min-microvolt = <1200000>;
    139			regulator-max-microvolt = <1200000>;
    140			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
    141		};
    142
    143		ldo2 {
    144			regulator-min-microvolt = <1128000>;
    145			regulator-max-microvolt = <1128000>;
    146			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
    147		};
    148
    149		ldo3 {
    150			regulator-min-microvolt = <800000>;
    151			regulator-max-microvolt = <800000>;
    152			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
    153		};
    154
    155		vreg_l4e_bb_0p875: ldo4 {
    156			regulator-min-microvolt = <872000>;
    157			regulator-max-microvolt = <872000>;
    158			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
    159		};
    160
    161		vreg_l5e_bb_1p7: ldo5 {
    162			regulator-min-microvolt = <1704000>;
    163			regulator-max-microvolt = <1900000>;
    164			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
    165		};
    166
    167		ldo6 {
    168			regulator-min-microvolt = <1800000>;
    169			regulator-max-microvolt = <1800000>;
    170			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
    171		};
    172
    173		ldo7 {
    174			regulator-min-microvolt = <480000>;
    175			regulator-max-microvolt = <900000>;
    176			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
    177		};
    178
    179		ldo8 {
    180			regulator-min-microvolt = <480000>;
    181			regulator-max-microvolt = <900000>;
    182			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
    183		};
    184
    185		ldo9 {
    186			regulator-min-microvolt = <800000>;
    187			regulator-max-microvolt = <800000>;
    188			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
    189		};
    190
    191		vreg_l10e_3p1: ldo10 {
    192			regulator-min-microvolt = <3088000>;
    193			regulator-max-microvolt = <3088000>;
    194			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
    195		};
    196
    197		ldo11 {
    198			regulator-min-microvolt = <1704000>;
    199			regulator-max-microvolt = <2928000>;
    200			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
    201		};
    202
    203		ldo12 {
    204			regulator-min-microvolt = <1200000>;
    205			regulator-max-microvolt = <1200000>;
    206			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
    207		};
    208
    209		ldo13 {
    210			regulator-min-microvolt = <1704000>;
    211			regulator-max-microvolt = <2928000>;
    212			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
    213		};
    214
    215		ldo14 {
    216			regulator-min-microvolt = <600000>;
    217			regulator-max-microvolt = <800000>;
    218			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
    219		};
    220
    221		ldo15 {
    222			regulator-min-microvolt = <1200000>;
    223			regulator-max-microvolt = <1200000>;
    224			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
    225		};
    226
    227		ldo16 {
    228			regulator-min-microvolt = <1704000>;
    229			regulator-max-microvolt = <1904000>;
    230			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
    231		};
    232	};
    233};
    234
    235&blsp1_uart3 {
    236	status = "ok";
    237};
    238
    239&ipa {
    240	status = "okay";
    241
    242	memory-region = <&ipa_fw_mem>;
    243};
    244
    245&pcie0_phy {
    246	status = "okay";
    247
    248	vdda-phy-supply = <&vreg_l1e_bb_1p2>;
    249	vdda-pll-supply = <&vreg_l4e_bb_0p875>;
    250};
    251
    252&pcie_ep {
    253	status = "okay";
    254
    255	pinctrl-names = "default";
    256	pinctrl-0 = <&pcie_ep_clkreq_default &pcie_ep_perst_default
    257		     &pcie_ep_wake_default>;
    258};
    259
    260&qpic_bam {
    261	status = "ok";
    262};
    263
    264&qpic_nand {
    265	status = "ok";
    266
    267	nand@0 {
    268		reg = <0>;
    269
    270		nand-ecc-strength = <8>;
    271		nand-ecc-step-size = <512>;
    272		nand-bus-width = <8>;
    273		/* ico and efs2 partitions are secured */
    274		secure-regions = /bits/ 64 <0x500000 0x500000
    275					    0xa00000 0xb00000>;
    276	};
    277};
    278
    279&remoteproc_mpss {
    280	status = "okay";
    281	memory-region = <&mpss_adsp_mem>;
    282};
    283
    284&tlmm {
    285	pcie_ep_clkreq_default: pcie_ep_clkreq_default {
    286		mux {
    287			pins = "gpio56";
    288			function = "pcie_clkreq";
    289		};
    290		config {
    291			pins = "gpio56";
    292			drive-strength = <2>;
    293			bias-disable;
    294		};
    295	};
    296
    297	pcie_ep_perst_default: pcie_ep_perst_default {
    298		mux {
    299			pins = "gpio57";
    300			function = "gpio";
    301		};
    302		config {
    303			pins = "gpio57";
    304			drive-strength = <2>;
    305			bias-pull-down;
    306		};
    307	};
    308
    309	pcie_ep_wake_default: pcie_ep_wake_default {
    310		mux {
    311			pins = "gpio53";
    312			function = "gpio";
    313		};
    314		config {
    315			pins = "gpio53";
    316			drive-strength = <2>;
    317			bias-disable;
    318		};
    319	};
    320};
    321
    322&usb_hsphy {
    323	status = "okay";
    324	vdda-pll-supply = <&vreg_l4e_bb_0p875>;
    325	vdda33-supply = <&vreg_l10e_3p1>;
    326	vdda18-supply = <&vreg_l5e_bb_1p7>;
    327};
    328
    329&usb_qmpphy {
    330	status = "okay";
    331	vdda-phy-supply = <&vreg_l4e_bb_0p875>;
    332	vdda-pll-supply = <&vreg_l1e_bb_1p2>;
    333};
    334
    335&usb {
    336	status = "okay";
    337};
    338
    339&usb_dwc3 {
    340	dr_mode = "peripheral";
    341};