cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

r8a7742-iwg21m.dtsi (2127B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Device Tree Source for the iWave RZ/G1H Qseven SOM
      4 *
      5 * Copyright (C) 2020 Renesas Electronics Corp.
      6 */
      7
      8#include "r8a7742.dtsi"
      9#include <dt-bindings/gpio/gpio.h>
     10
     11/ {
     12	compatible = "iwave,g21m", "renesas,r8a7742";
     13
     14	memory@40000000 {
     15		device_type = "memory";
     16		reg = <0 0x40000000 0 0x40000000>;
     17	};
     18
     19	memory@200000000 {
     20		device_type = "memory";
     21		reg = <2 0x00000000 0 0x40000000>;
     22	};
     23
     24	reg_3p3v: 3p3v {
     25		compatible = "regulator-fixed";
     26		regulator-name = "3P3V";
     27		regulator-min-microvolt = <3300000>;
     28		regulator-max-microvolt = <3300000>;
     29		regulator-always-on;
     30		regulator-boot-on;
     31	};
     32};
     33
     34&extal_clk {
     35	clock-frequency = <20000000>;
     36};
     37
     38&gpio0 {
     39	/* GP0_18 set low to select QSPI. Doing so will disable VIN2 */
     40	qspi-en-hog {
     41		gpio-hog;
     42		gpios = <18 GPIO_ACTIVE_HIGH>;
     43		output-low;
     44		line-name = "QSPI_EN";
     45	};
     46};
     47
     48&i2c0 {
     49	pinctrl-0 = <&i2c0_pins>;
     50	pinctrl-names = "default";
     51
     52	status = "okay";
     53	clock-frequency = <400000>;
     54
     55	rtc@68 {
     56		compatible = "ti,bq32000";
     57		reg = <0x68>;
     58		interrupt-parent = <&gpio1>;
     59		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
     60	};
     61};
     62
     63&mmcif1 {
     64	pinctrl-0 = <&mmc1_pins>;
     65	pinctrl-names = "default";
     66
     67	vmmc-supply = <&reg_3p3v>;
     68	bus-width = <4>;
     69	non-removable;
     70	status = "okay";
     71};
     72
     73&pfc {
     74	i2c0_pins: i2c0 {
     75		groups = "i2c0";
     76		function = "i2c0";
     77	};
     78
     79	mmc1_pins: mmc1 {
     80		groups = "mmc1_data4", "mmc1_ctrl";
     81		function = "mmc1";
     82	};
     83
     84	qspi_pins: qspi {
     85		groups = "qspi_ctrl", "qspi_data2";
     86		function = "qspi";
     87	};
     88};
     89
     90&qspi {
     91	pinctrl-0 = <&qspi_pins>;
     92	pinctrl-names = "default";
     93
     94	status = "okay";
     95
     96	flash: flash@0 {
     97		compatible = "sst,sst25vf016b", "jedec,spi-nor";
     98		reg = <0>;
     99		spi-max-frequency = <50000000>;
    100		m25p,fast-read;
    101		spi-cpol;
    102		spi-cpha;
    103
    104		partitions {
    105			compatible = "fixed-partitions";
    106			#address-cells = <1>;
    107			#size-cells = <1>;
    108
    109			partition@0 {
    110				label = "bootloader";
    111				reg = <0x00000000 0x000c0000>;
    112				read-only;
    113			};
    114			partition@c0000 {
    115				label = "env";
    116				reg = <0x000c0000 0x00002000>;
    117			};
    118			partition@c2000 {
    119				label = "user";
    120				reg = <0x000c2000 0x0013e000>;
    121			};
    122		};
    123	};
    124};