cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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r8a7743-iwg20m.dtsi (1738B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Device Tree Source for the iWave-RZG1M-20M Qseven SOM
      4 *
      5 * Copyright (C) 2017 Renesas Electronics Corp.
      6 */
      7
      8#include "r8a7743.dtsi"
      9#include <dt-bindings/gpio/gpio.h>
     10
     11/ {
     12	compatible = "iwave,g20m", "renesas,r8a7743";
     13
     14	memory@40000000 {
     15		device_type = "memory";
     16		reg = <0 0x40000000 0 0x20000000>;
     17	};
     18
     19	memory@200000000 {
     20		device_type = "memory";
     21		reg = <2 0x00000000 0 0x20000000>;
     22	};
     23
     24	reg_3p3v: 3p3v {
     25		compatible = "regulator-fixed";
     26		regulator-name = "3P3V";
     27		regulator-min-microvolt = <3300000>;
     28		regulator-max-microvolt = <3300000>;
     29		regulator-always-on;
     30		regulator-boot-on;
     31	};
     32};
     33
     34&extal_clk {
     35	clock-frequency = <20000000>;
     36};
     37
     38&pfc {
     39	mmcif0_pins: mmc {
     40		groups = "mmc_data8_b", "mmc_ctrl";
     41		function = "mmc";
     42	};
     43
     44	qspi_pins: qspi {
     45		groups = "qspi_ctrl", "qspi_data2";
     46		function = "qspi";
     47	};
     48
     49	sdhi0_pins: sd0 {
     50		groups = "sdhi0_data4", "sdhi0_ctrl";
     51		function = "sdhi0";
     52		power-source = <3300>;
     53	};
     54};
     55
     56&mmcif0 {
     57	pinctrl-0 = <&mmcif0_pins>;
     58	pinctrl-names = "default";
     59
     60	vmmc-supply = <&reg_3p3v>;
     61	bus-width = <8>;
     62	non-removable;
     63	status = "okay";
     64};
     65
     66&qspi {
     67	pinctrl-0 = <&qspi_pins>;
     68	pinctrl-names = "default";
     69
     70	status = "okay";
     71
     72	/* WARNING - This device contains the bootloader. Handle with care. */
     73	flash: flash@0 {
     74		#address-cells = <1>;
     75		#size-cells = <1>;
     76		compatible = "sst,sst25vf016b", "jedec,spi-nor";
     77		reg = <0>;
     78		spi-max-frequency = <50000000>;
     79		spi-tx-bus-width = <1>;
     80		spi-rx-bus-width = <1>;
     81		m25p,fast-read;
     82		spi-cpol;
     83		spi-cpha;
     84	};
     85};
     86
     87&sdhi0 {
     88	pinctrl-0 = <&sdhi0_pins>;
     89	pinctrl-names = "default";
     90
     91	vmmc-supply = <&reg_3p3v>;
     92	vqmmc-supply = <&reg_3p3v>;
     93	cd-gpios = <&gpio7 11 GPIO_ACTIVE_LOW>;
     94	status = "okay";
     95};